@@ -319,13 +319,7 @@ struct mlx5e_sq_wqe_info {
319
319
u8 num_wqebbs ;
320
320
};
321
321
322
- enum mlx5e_sq_type {
323
- MLX5E_SQ_TXQ ,
324
- MLX5E_SQ_ICO ,
325
- MLX5E_SQ_XDP
326
- };
327
-
328
- struct mlx5e_sq {
322
+ struct mlx5e_txqsq {
329
323
/* data path */
330
324
331
325
/* dirtied @completion */
@@ -339,18 +333,11 @@ struct mlx5e_sq {
339
333
340
334
struct mlx5e_cq cq ;
341
335
342
- /* pointers to per tx element info: write@xmit, read@completion */
343
- union {
344
- struct {
345
- struct sk_buff * * skb ;
346
- struct mlx5e_sq_dma * dma_fifo ;
347
- struct mlx5e_tx_wqe_info * wqe_info ;
348
- } txq ;
349
- struct mlx5e_sq_wqe_info * ico_wqe ;
350
- struct {
351
- struct mlx5e_dma_info * di ;
352
- bool doorbell ;
353
- } xdp ;
336
+ /* write@xmit, read@completion */
337
+ struct {
338
+ struct sk_buff * * skb ;
339
+ struct mlx5e_sq_dma * dma_fifo ;
340
+ struct mlx5e_tx_wqe_info * wqe_info ;
354
341
} db ;
355
342
356
343
/* read only */
@@ -372,7 +359,67 @@ struct mlx5e_sq {
372
359
struct mlx5e_channel * channel ;
373
360
int tc ;
374
361
u32 rate_limit ;
375
- u8 type ;
362
+ } ____cacheline_aligned_in_smp ;
363
+
364
+ struct mlx5e_xdpsq {
365
+ /* data path */
366
+
367
+ /* dirtied @rx completion */
368
+ u16 cc ;
369
+ u16 pc ;
370
+
371
+ struct mlx5e_cq cq ;
372
+
373
+ /* write@xmit, read@completion */
374
+ struct {
375
+ struct mlx5e_dma_info * di ;
376
+ bool doorbell ;
377
+ } db ;
378
+
379
+ /* read only */
380
+ struct mlx5_wq_cyc wq ;
381
+ void __iomem * uar_map ;
382
+ u32 sqn ;
383
+ struct device * pdev ;
384
+ __be32 mkey_be ;
385
+ u8 min_inline_mode ;
386
+ unsigned long state ;
387
+
388
+ /* control path */
389
+ struct mlx5_wq_ctrl wq_ctrl ;
390
+ struct mlx5e_channel * channel ;
391
+ } ____cacheline_aligned_in_smp ;
392
+
393
+ struct mlx5e_icosq {
394
+ /* data path */
395
+
396
+ /* dirtied @completion */
397
+ u16 cc ;
398
+
399
+ /* dirtied @xmit */
400
+ u16 pc ____cacheline_aligned_in_smp ;
401
+ u32 dma_fifo_pc ;
402
+ u16 prev_cc ;
403
+
404
+ struct mlx5e_cq cq ;
405
+
406
+ /* write@xmit, read@completion */
407
+ struct {
408
+ struct mlx5e_sq_wqe_info * ico_wqe ;
409
+ } db ;
410
+
411
+ /* read only */
412
+ struct mlx5_wq_cyc wq ;
413
+ void __iomem * uar_map ;
414
+ u32 sqn ;
415
+ u16 edge ;
416
+ struct device * pdev ;
417
+ __be32 mkey_be ;
418
+ unsigned long state ;
419
+
420
+ /* control path */
421
+ struct mlx5_wq_ctrl wq_ctrl ;
422
+ struct mlx5e_channel * channel ;
376
423
} ____cacheline_aligned_in_smp ;
377
424
378
425
static inline bool
@@ -477,7 +524,7 @@ struct mlx5e_rq {
477
524
478
525
/* XDP */
479
526
struct bpf_prog * xdp_prog ;
480
- struct mlx5e_sq xdpsq ;
527
+ struct mlx5e_xdpsq xdpsq ;
481
528
482
529
/* control */
483
530
struct mlx5_wq_ctrl wq_ctrl ;
@@ -497,8 +544,8 @@ enum channel_flags {
497
544
struct mlx5e_channel {
498
545
/* data path */
499
546
struct mlx5e_rq rq ;
500
- struct mlx5e_sq sq [MLX5E_MAX_NUM_TC ];
501
- struct mlx5e_sq icosq ; /* internal control operations */
547
+ struct mlx5e_txqsq sq [MLX5E_MAX_NUM_TC ];
548
+ struct mlx5e_icosq icosq ; /* internal control operations */
502
549
bool xdp ;
503
550
struct napi_struct napi ;
504
551
struct device * pdev ;
@@ -680,7 +727,7 @@ struct mlx5e_profile {
680
727
681
728
struct mlx5e_priv {
682
729
/* priv data path fields - start */
683
- struct mlx5e_sq * * txq_to_sq_map ;
730
+ struct mlx5e_txqsq * * txq_to_sq_map ;
684
731
int channeltc_to_txq_map [MLX5E_MAX_NUM_CHANNELS ][MLX5E_MAX_NUM_TC ];
685
732
struct bpf_prog * xdp_prog ;
686
733
/* priv data path fields - end */
@@ -731,8 +778,8 @@ int mlx5e_napi_poll(struct napi_struct *napi, int budget);
731
778
bool mlx5e_poll_tx_cq (struct mlx5e_cq * cq , int napi_budget );
732
779
int mlx5e_poll_rx_cq (struct mlx5e_cq * cq , int budget );
733
780
bool mlx5e_poll_xdpsq_cq (struct mlx5e_cq * cq );
734
- void mlx5e_free_xdpsq_descs (struct mlx5e_sq * sq );
735
- void mlx5e_free_sq_descs (struct mlx5e_sq * sq );
781
+ void mlx5e_free_txqsq_descs (struct mlx5e_txqsq * sq );
782
+ void mlx5e_free_xdpsq_descs (struct mlx5e_xdpsq * sq );
736
783
737
784
void mlx5e_page_release (struct mlx5e_rq * rq , struct mlx5e_dma_info * dma_info ,
738
785
bool recycle );
0 commit comments