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Merge tag 'irqchip-fixes-6.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull irqchip fixes from Marc Zyngier: - DT binding updates for Renesas r8a779f0 and rzg2l - Let GICv3 honor the "dma-non-coherent" attribute for systems that rely on SW guessing what the HW supports - Fix the RISC-V INTC probing by marking all devices as initialised at once - Properly translate interrupt numbers from DT on stm32-exti - Use irq_data_get_irq_chip_data() in the rzg2l driver instead of blindly dereferencing the irq_data structure - Add a MAINTAINERS entry for the various ARM GIC irqchip drivers - Remove myself as the top-level irqchip/irqdomain maintainer Link: https://lore.kernel.org/all/[email protected]
2 parents 9cd847e + b673fe1 commit 4dc5af1

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‎Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml

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Original file line numberDiff line numberDiff line change
@@ -106,6 +106,12 @@ properties:
106106
$ref: /schemas/types.yaml#/definitions/uint32
107107
maximum: 4096
108108

109+
dma-noncoherent:
110+
description:
111+
Present if the GIC redistributors permit programming shareability
112+
and cacheability attributes but are connected to a non-coherent
113+
downstream interconnect.
114+
109115
msi-controller:
110116
description:
111117
Only present if the Message Based Interrupt functionality is
@@ -193,6 +199,12 @@ patternProperties:
193199
compatible:
194200
const: arm,gic-v3-its
195201

202+
dma-noncoherent:
203+
description:
204+
Present if the GIC ITS permits programming shareability and
205+
cacheability attributes but is connected to a non-coherent
206+
downstream interconnect.
207+
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msi-controller: true
197209

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"#msi-cells":

‎Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml

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@@ -37,6 +37,7 @@ properties:
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- renesas,intc-ex-r8a77990 # R-Car E3
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- renesas,intc-ex-r8a77995 # R-Car D3
3939
- renesas,intc-ex-r8a779a0 # R-Car V3U
40+
- renesas,intc-ex-r8a779f0 # R-Car S4-8
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- renesas,intc-ex-r8a779g0 # R-Car V4H
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- const: renesas,irqc
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‎Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml

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Original file line numberDiff line numberDiff line change
@@ -19,13 +19,11 @@ description: |
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- NMI edge select (NMI is not treated as NMI exception and supports fall edge and
2020
stand-up edge detection interrupts)
2121
22-
allOf:
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- $ref: /schemas/interrupt-controller.yaml#
24-
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properties:
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compatible:
2724
items:
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- enum:
26+
- renesas,r9a07g043u-irqc # RZ/G2UL
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- renesas,r9a07g044-irqc # RZ/G2{L,LC}
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- renesas,r9a07g054-irqc # RZ/V2L
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- const: renesas,rzg2l-irqc
@@ -45,7 +43,96 @@ properties:
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maxItems: 1
4644

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interrupts:
48-
maxItems: 41
46+
minItems: 41
47+
items:
48+
- description: NMI interrupt
49+
- description: IRQ0 interrupt
50+
- description: IRQ1 interrupt
51+
- description: IRQ2 interrupt
52+
- description: IRQ3 interrupt
53+
- description: IRQ4 interrupt
54+
- description: IRQ5 interrupt
55+
- description: IRQ6 interrupt
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- description: IRQ7 interrupt
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- description: GPIO interrupt, TINT0
58+
- description: GPIO interrupt, TINT1
59+
- description: GPIO interrupt, TINT2
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- description: GPIO interrupt, TINT3
61+
- description: GPIO interrupt, TINT4
62+
- description: GPIO interrupt, TINT5
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- description: GPIO interrupt, TINT6
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- description: GPIO interrupt, TINT7
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- description: GPIO interrupt, TINT8
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- description: GPIO interrupt, TINT9
67+
- description: GPIO interrupt, TINT10
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- description: GPIO interrupt, TINT11
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- description: GPIO interrupt, TINT12
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- description: GPIO interrupt, TINT13
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- description: GPIO interrupt, TINT14
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- description: GPIO interrupt, TINT15
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- description: GPIO interrupt, TINT16
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- description: GPIO interrupt, TINT17
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- description: GPIO interrupt, TINT18
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- description: GPIO interrupt, TINT19
77+
- description: GPIO interrupt, TINT20
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- description: GPIO interrupt, TINT21
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- description: GPIO interrupt, TINT22
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- description: GPIO interrupt, TINT23
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- description: GPIO interrupt, TINT24
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- description: GPIO interrupt, TINT25
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- description: GPIO interrupt, TINT26
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- description: GPIO interrupt, TINT27
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- description: GPIO interrupt, TINT28
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- description: GPIO interrupt, TINT29
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- description: GPIO interrupt, TINT30
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- description: GPIO interrupt, TINT31
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- description: Bus error interrupt
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interrupt-names:
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minItems: 41
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items:
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- const: nmi
95+
- const: irq0
96+
- const: irq1
97+
- const: irq2
98+
- const: irq3
99+
- const: irq4
100+
- const: irq5
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- const: irq6
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- const: irq7
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- const: tint0
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- const: tint1
105+
- const: tint2
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- const: tint3
107+
- const: tint4
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- const: tint5
109+
- const: tint6
110+
- const: tint7
111+
- const: tint8
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- const: tint9
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- const: tint10
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- const: tint11
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- const: tint12
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- const: tint13
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- const: tint14
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- const: tint15
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- const: tint16
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- const: tint17
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- const: tint18
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- const: tint19
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- const: tint20
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- const: tint21
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- const: tint22
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- const: tint23
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- const: tint24
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- const: tint25
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- const: tint26
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- const: tint27
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- const: tint28
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- const: tint29
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- const: tint30
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- const: tint31
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- const: bus-err
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clocks:
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maxItems: 2
@@ -73,6 +160,23 @@ required:
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- power-domains
74161
- resets
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allOf:
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- $ref: /schemas/interrupt-controller.yaml#
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- if:
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properties:
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compatible:
169+
contains:
170+
const: renesas,r9a07g043u-irqc
171+
then:
172+
properties:
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interrupts:
174+
minItems: 42
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interrupt-names:
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minItems: 42
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required:
178+
- interrupt-names
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unevaluatedProperties: false
77181

78182
examples:
@@ -81,55 +185,66 @@ examples:
81185
#include <dt-bindings/clock/r9a07g044-cpg.h>
82186
83187
irqc: interrupt-controller@110a0000 {
84-
compatible = "renesas,r9a07g044-irqc", "renesas,rzg2l-irqc";
85-
reg = <0x110a0000 0x10000>;
86-
#interrupt-cells = <2>;
87-
#address-cells = <0>;
88-
interrupt-controller;
89-
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
90-
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
91-
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
92-
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
94-
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
95-
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
96-
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
97-
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
98-
<GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
99-
<GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>,
100-
<GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>,
101-
<GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>,
102-
<GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
103-
<GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
104-
<GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
105-
<GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
106-
<GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
107-
<GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
108-
<GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>,
109-
<GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
110-
<GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
111-
<GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
112-
<GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
113-
<GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
114-
<GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>,
115-
<GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>,
116-
<GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,
117-
<GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>,
118-
<GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
119-
<GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
120-
<GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
121-
<GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
122-
<GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
123-
<GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
124-
<GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
125-
<GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
126-
<GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
127-
<GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
128-
<GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
129-
<GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>;
130-
clocks = <&cpg CPG_MOD R9A07G044_IA55_CLK>,
131-
<&cpg CPG_MOD R9A07G044_IA55_PCLK>;
132-
clock-names = "clk", "pclk";
133-
power-domains = <&cpg>;
134-
resets = <&cpg R9A07G044_IA55_RESETN>;
188+
compatible = "renesas,r9a07g044-irqc", "renesas,rzg2l-irqc";
189+
reg = <0x110a0000 0x10000>;
190+
#interrupt-cells = <2>;
191+
#address-cells = <0>;
192+
interrupt-controller;
193+
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
194+
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
195+
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
196+
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
197+
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
198+
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
199+
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
200+
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
201+
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
202+
<GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
203+
<GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>,
204+
<GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>,
205+
<GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>,
206+
<GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
207+
<GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
208+
<GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
209+
<GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
210+
<GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
211+
<GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
212+
<GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>,
213+
<GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
214+
<GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
215+
<GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
216+
<GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
217+
<GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
218+
<GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>,
219+
<GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>,
220+
<GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,
221+
<GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>,
222+
<GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
223+
<GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
224+
<GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
225+
<GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
226+
<GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
227+
<GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
228+
<GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
229+
<GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
230+
<GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
231+
<GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
232+
<GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
233+
<GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>;
234+
interrupt-names = "nmi",
235+
"irq0", "irq1", "irq2", "irq3",
236+
"irq4", "irq5", "irq6", "irq7",
237+
"tint0", "tint1", "tint2", "tint3",
238+
"tint4", "tint5", "tint6", "tint7",
239+
"tint8", "tint9", "tint10", "tint11",
240+
"tint12", "tint13", "tint14", "tint15",
241+
"tint16", "tint17", "tint18", "tint19",
242+
"tint20", "tint21", "tint22", "tint23",
243+
"tint24", "tint25", "tint26", "tint27",
244+
"tint28", "tint29", "tint30", "tint31";
245+
clocks = <&cpg CPG_MOD R9A07G044_IA55_CLK>,
246+
<&cpg CPG_MOD R9A07G044_IA55_PCLK>;
247+
clock-names = "clk", "pclk";
248+
power-domains = <&cpg>;
249+
resets = <&cpg R9A07G044_IA55_RESETN>;
135250
};

‎MAINTAINERS

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1585,6 +1585,17 @@ F: arch/arm/include/asm/arch_timer.h
15851585
F: arch/arm64/include/asm/arch_timer.h
15861586
F: drivers/clocksource/arm_arch_timer.c
15871587

1588+
ARM GENERIC INTERRUPT CONTROLLER DRIVERS
1589+
M: Marc Zyngier <[email protected]>
1590+
L: [email protected] (moderated for non-subscribers)
1591+
S: Maintained
1592+
F: Documentation/devicetree/bindings/interrupt-controller/arm,gic*
1593+
F: arch/arm/include/asm/arch_gicv3.h
1594+
F: arch/arm64/include/asm/arch_gicv3.h
1595+
F: drivers/irqchip/irq-gic*.[ch]
1596+
F: include/linux/irqchip/arm-gic*.h
1597+
F: include/linux/irqchip/arm-vgic-info.h
1598+
15881599
ARM HDLCD DRM DRIVER
15891600
M: Liviu Dudau <[email protected]>
15901601
S: Supported
@@ -11064,7 +11075,7 @@ F: Documentation/devicetree/bindings/sound/irondevice,*
1106411075
F: sound/soc/codecs/sma*
1106511076

1106611077
IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
11067-
M: Marc Zyngier <[email protected]>
11078+
M: Thomas Gleixner <[email protected]>
1106811079
S: Maintained
1106911080
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
1107011081
F: Documentation/core-api/irq/irq-domain.rst
@@ -11083,7 +11094,6 @@ F: lib/group_cpus.c
1108311094

1108411095
IRQCHIP DRIVERS
1108511096
M: Thomas Gleixner <[email protected]>
11086-
M: Marc Zyngier <[email protected]>
1108711097
L: [email protected]
1108811098
S: Maintained
1108911099
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core

‎drivers/irqchip/irq-gic-common.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29,4 +29,8 @@ void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks,
2929
void gic_enable_of_quirks(const struct device_node *np,
3030
const struct gic_quirk *quirks, void *data);
3131

32+
#define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0)
33+
#define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1)
34+
#define RDIST_FLAGS_FORCE_NON_SHAREABLE (1 << 2)
35+
3236
#endif /* _IRQ_GIC_COMMON_H */

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