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Commit bcb80e5

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Borislav Petkov
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x86, microcode, AMD: Add microcode revision to /proc/cpuinfo
Enable microcode revision output for AMD after 506ed6b ("x86, intel: Output microcode revision in /proc/cpuinfo") did it for Intel. Signed-off-by: Borislav Petkov <[email protected]>
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-2
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2 files changed

+7
-2
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arch/x86/kernel/cpu/amd.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -412,6 +412,8 @@ static void __cpuinit early_init_amd_mc(struct cpuinfo_x86 *c)
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static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
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{
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u32 dummy;
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early_init_amd_mc(c);
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/*
@@ -442,6 +444,8 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
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}
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#endif
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rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
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/* We need to do the following only once */
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if (c != &boot_cpu_data)
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return;

arch/x86/kernel/microcode_amd.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -74,14 +74,13 @@ static struct equiv_cpu_entry *equiv_cpu_table;
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static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
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{
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struct cpuinfo_x86 *c = &cpu_data(cpu);
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u32 dummy;
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if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
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pr_warning("CPU%d: family %d not supported\n", cpu, c->x86);
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return -1;
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}
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rdmsr(MSR_AMD64_PATCH_LEVEL, csig->rev, dummy);
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csig->rev = c->microcode;
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pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
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return 0;
@@ -130,6 +129,7 @@ static int apply_microcode_amd(int cpu)
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int cpu_num = raw_smp_processor_id();
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struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
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struct microcode_amd *mc_amd = uci->mc;
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struct cpuinfo_x86 *c = &cpu_data(cpu);
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/* We should bind the task to the CPU */
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BUG_ON(cpu_num != cpu);
@@ -150,6 +150,7 @@ static int apply_microcode_amd(int cpu)
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pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
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uci->cpu_sig.rev = rev;
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c->microcode = rev;
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return 0;
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}

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