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ARM: dts: arm: Update ICST clock nodes 'reg' and node names
Add a 'reg' entry for ICST clock nodes on the Arm Ltd platforms. The 'reg' entry is the VCO register address. With this, the node name can be updated to use a generic node name, 'clock-controller', and a unit-address. Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Cc: Linus Walleij <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected]' Signed-off-by: Arnd Bergmann <[email protected]>
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7 files changed

+68
-31
lines changed

7 files changed

+68
-31
lines changed

‎arch/arm/boot/dts/arm-realview-eb.dtsi

Lines changed: 10 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -269,36 +269,41 @@
269269
label = "versatile:7";
270270
default-state = "off";
271271
};
272-
oscclk0: osc0@0c {
272+
oscclk0: clock-controller@c {
273273
compatible = "arm,syscon-icst307";
274+
reg = <0x0c 0x04>;
274275
#clock-cells = <0>;
275276
lock-offset = <0x20>;
276277
vco-offset = <0x0C>;
277278
clocks = <&xtal24mhz>;
278279
};
279-
oscclk1: osc1@10 {
280+
oscclk1: clock-controller@10 {
280281
compatible = "arm,syscon-icst307";
282+
reg = <0x10 0x04>;
281283
#clock-cells = <0>;
282284
lock-offset = <0x20>;
283285
vco-offset = <0x10>;
284286
clocks = <&xtal24mhz>;
285287
};
286-
oscclk2: osc2@14 {
288+
oscclk2: clock-controller@14 {
287289
compatible = "arm,syscon-icst307";
290+
reg = <0x14 0x04>;
288291
#clock-cells = <0>;
289292
lock-offset = <0x20>;
290293
vco-offset = <0x14>;
291294
clocks = <&xtal24mhz>;
292295
};
293-
oscclk3: osc3@18 {
296+
oscclk3: clock-controller@18 {
294297
compatible = "arm,syscon-icst307";
298+
reg = <0x18 0x04>;
295299
#clock-cells = <0>;
296300
lock-offset = <0x20>;
297301
vco-offset = <0x18>;
298302
clocks = <&xtal24mhz>;
299303
};
300-
oscclk4: osc4@1c {
304+
oscclk4: clock-controller@1c {
301305
compatible = "arm,syscon-icst307";
306+
reg = <0x1c 0x04>;
302307
#clock-cells = <0>;
303308
lock-offset = <0x20>;
304309
vco-offset = <0x1c>;

‎arch/arm/boot/dts/arm-realview-pb1176.dts

Lines changed: 10 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -287,36 +287,41 @@
287287
label = "versatile:7";
288288
default-state = "off";
289289
};
290-
oscclk0: osc0@0c {
290+
oscclk0: clock-controller@c {
291291
compatible = "arm,syscon-icst307";
292+
reg = <0x0c 0x04>;
292293
#clock-cells = <0>;
293294
lock-offset = <0x20>;
294295
vco-offset = <0x0C>;
295296
clocks = <&xtal24mhz>;
296297
};
297-
oscclk1: osc1@10 {
298+
oscclk1: clock-controller@10 {
298299
compatible = "arm,syscon-icst307";
300+
reg = <0x10 0x04>;
299301
#clock-cells = <0>;
300302
lock-offset = <0x20>;
301303
vco-offset = <0x10>;
302304
clocks = <&xtal24mhz>;
303305
};
304-
oscclk2: osc2@14 {
306+
oscclk2: clock-controller@14 {
305307
compatible = "arm,syscon-icst307";
308+
reg = <0x14 0x04>;
306309
#clock-cells = <0>;
307310
lock-offset = <0x20>;
308311
vco-offset = <0x14>;
309312
clocks = <&xtal24mhz>;
310313
};
311-
oscclk3: osc3@18 {
314+
oscclk3: clock-controller@18 {
312315
compatible = "arm,syscon-icst307";
316+
reg = <0x18 0x04>;
313317
#clock-cells = <0>;
314318
lock-offset = <0x20>;
315319
vco-offset = <0x18>;
316320
clocks = <&xtal24mhz>;
317321
};
318-
oscclk4: osc4@1c {
322+
oscclk4: clock-controller@1c {
319323
compatible = "arm,syscon-icst307";
324+
reg = <0x1c 0x04>;
320325
#clock-cells = <0>;
321326
lock-offset = <0x20>;
322327
vco-offset = <0x1c>;

‎arch/arm/boot/dts/arm-realview-pb11mp.dts

Lines changed: 14 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -378,50 +378,57 @@
378378
default-state = "off";
379379
};
380380

381-
oscclk0: osc0@0c {
381+
oscclk0: clock-controller@c {
382382
compatible = "arm,syscon-icst307";
383+
reg = <0x0c 0x04>;
383384
#clock-cells = <0>;
384385
lock-offset = <0x20>;
385386
vco-offset = <0x0C>;
386387
clocks = <&xtal24mhz>;
387388
};
388-
oscclk1: osc1@10 {
389+
oscclk1: clock-controller@10 {
389390
compatible = "arm,syscon-icst307";
391+
reg = <0x10 0x04>;
390392
#clock-cells = <0>;
391393
lock-offset = <0x20>;
392394
vco-offset = <0x10>;
393395
clocks = <&xtal24mhz>;
394396
};
395-
oscclk2: osc2@14 {
397+
oscclk2: clock-controller@14 {
396398
compatible = "arm,syscon-icst307";
399+
reg = <0x14 0x04>;
397400
#clock-cells = <0>;
398401
lock-offset = <0x20>;
399402
vco-offset = <0x14>;
400403
clocks = <&xtal24mhz>;
401404
};
402-
oscclk3: osc3@18 {
405+
oscclk3: clock-controller@18 {
403406
compatible = "arm,syscon-icst307";
407+
reg = <0x18 0x04>;
404408
#clock-cells = <0>;
405409
lock-offset = <0x20>;
406410
vco-offset = <0x18>;
407411
clocks = <&xtal24mhz>;
408412
};
409-
oscclk4: osc4@1c {
413+
oscclk4: clock-controller@1c {
410414
compatible = "arm,syscon-icst307";
415+
reg = <0x1c 0x04>;
411416
#clock-cells = <0>;
412417
lock-offset = <0x20>;
413418
vco-offset = <0x1c>;
414419
clocks = <&xtal24mhz>;
415420
};
416-
oscclk5: osc5@d4 {
421+
oscclk5: clock-controller@d4 {
417422
compatible = "arm,syscon-icst307";
423+
reg = <0xd4 0x04>;
418424
#clock-cells = <0>;
419425
lock-offset = <0x20>;
420426
vco-offset = <0xd4>;
421427
clocks = <&xtal24mhz>;
422428
};
423-
oscclk6: osc6@d8 {
429+
oscclk6: clock-controller@d8 {
424430
compatible = "arm,syscon-icst307";
431+
reg = <0xd8 0x04>;
425432
#clock-cells = <0>;
426433
lock-offset = <0x20>;
427434
vco-offset = <0xd8>;

‎arch/arm/boot/dts/arm-realview-pbx.dtsi

Lines changed: 10 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -291,36 +291,41 @@
291291
label = "versatile:7";
292292
default-state = "off";
293293
};
294-
oscclk0: osc0@0c {
294+
oscclk0: clock-controller@c {
295295
compatible = "arm,syscon-icst307";
296+
reg = <0x0c 0x04>;
296297
#clock-cells = <0>;
297298
lock-offset = <0x20>;
298299
vco-offset = <0x0C>;
299300
clocks = <&xtal24mhz>;
300301
};
301-
oscclk1: osc1@10 {
302+
oscclk1: clock-controller@10 {
302303
compatible = "arm,syscon-icst307";
304+
reg = <0x10 0x04>;
303305
#clock-cells = <0>;
304306
lock-offset = <0x20>;
305307
vco-offset = <0x10>;
306308
clocks = <&xtal24mhz>;
307309
};
308-
oscclk2: osc2@14 {
310+
oscclk2: clock-controller@14 {
309311
compatible = "arm,syscon-icst307";
312+
reg = <0x14 0x04>;
310313
#clock-cells = <0>;
311314
lock-offset = <0x20>;
312315
vco-offset = <0x14>;
313316
clocks = <&xtal24mhz>;
314317
};
315-
oscclk3: osc3@18 {
318+
oscclk3: clock-controller@18 {
316319
compatible = "arm,syscon-icst307";
320+
reg = <0x18 0x04>;
317321
#clock-cells = <0>;
318322
lock-offset = <0x20>;
319323
vco-offset = <0x18>;
320324
clocks = <&xtal24mhz>;
321325
};
322-
oscclk4: osc4@1c {
326+
oscclk4: clock-controller@1c {
323327
compatible = "arm,syscon-icst307";
328+
reg = <0x1c 0x04>;
324329
#clock-cells = <0>;
325330
lock-offset = <0x20>;
326331
vco-offset = <0x1c>;

‎arch/arm/boot/dts/integratorap-im-pd1.dts

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -28,18 +28,23 @@
2828
syscon@0 {
2929
compatible = "arm,im-pd1-syscon", "syscon";
3030
reg = <0x00000000 0x1000>;
31+
ranges;
32+
#address-cells = <1>;
33+
#size-cells = <1>;
3134

32-
vco1: vco1-clock {
35+
vco1: clock-controller@0 {
3336
compatible = "arm,impd1-vco1";
37+
reg = <0x00 0x04>;
3438
#clock-cells = <0>;
3539
lock-offset = <0x08>;
3640
vco-offset = <0x00>;
3741
clocks = <&sysclk>;
3842
clock-output-names = "IM-PD1-VCO1";
3943
};
4044

41-
vco2: vco2-clock {
45+
vco2: clock-controller@4 {
4246
compatible = "arm,impd1-vco2";
47+
reg = <0x04 0x04>;
4348
#clock-cells = <0>;
4449
lock-offset = <0x08>;
4550
vco-offset = <0x04>;

‎arch/arm/boot/dts/integratorap.dts

Lines changed: 11 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -88,17 +88,19 @@
8888
};
8989

9090
/* Oscillator on the core module, clocks the CPU core */
91-
cmosc: cmosc@24M {
91+
cmosc: clock-controller@8 {
9292
compatible = "arm,syscon-icst525-integratorap-cm";
93+
reg = <0x08 0x04>;
9394
#clock-cells = <0>;
9495
lock-offset = <0x14>;
9596
vco-offset = <0x08>;
9697
clocks = <&cm24mhz>;
9798
};
9899

99100
/* Auxilary oscillator on the core module, 32.369MHz at boot */
100-
auxosc: auxosc@24M {
101+
auxosc: clock-controller@1c {
101102
compatible = "arm,syscon-icst525";
103+
reg = <0x1c 0x04>;
102104
#clock-cells = <0>;
103105
lock-offset = <0x14>;
104106
vco-offset = <0x1c>;
@@ -109,22 +111,27 @@
109111
syscon {
110112
compatible = "arm,integrator-ap-syscon", "syscon";
111113
reg = <0x11000000 0x100>;
114+
ranges = <0x0 0x11000000 0x100>;
115+
#size-cells = <1>;
116+
#address-cells = <1>;
112117

113118
/*
114119
* SYSCLK clocks PCIv3 bridge, system controller and the
115120
* logic modules.
116121
*/
117-
sysclk: apsys@24M {
122+
sysclk: clock-controller@4 {
118123
compatible = "arm,syscon-icst525-integratorap-sys";
124+
reg = <0x04 0x04>;
119125
#clock-cells = <0>;
120126
lock-offset = <0x1c>;
121127
vco-offset = <0x04>;
122128
clocks = <&xtal24mhz>;
123129
};
124130

125131
/* One-bit control for the PCI bus clock (33 or 25 MHz) */
126-
pciclk: pciclk@24M {
132+
pciclk: clock-controller@4,8 {
127133
compatible = "arm,syscon-icst525-integratorap-pci";
134+
reg = <0x04 0x04>;
128135
#clock-cells = <0>;
129136
lock-offset = <0x1c>;
130137
vco-offset = <0x04>;

‎arch/arm/boot/dts/integratorcp.dts

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -92,26 +92,29 @@
9292
};
9393

9494
/* Oscillator on the core module, clocks the CPU core */
95-
cmcore: cmosc@24M {
95+
cmcore: clock-controller@8 {
9696
compatible = "arm,syscon-icst525-integratorcp-cm-core";
97+
reg = <0x08 0x04>;
9798
#clock-cells = <0>;
9899
lock-offset = <0x14>;
99100
vco-offset = <0x08>;
100101
clocks = <&cm24mhz>;
101102
};
102103

103104
/* Oscillator on the core module, clocks the memory bus */
104-
cmmem: cmosc@24M {
105+
cmmem: clock-controller@8,12 {
105106
compatible = "arm,syscon-icst525-integratorcp-cm-mem";
107+
reg = <0x08 0x04>;
106108
#clock-cells = <0>;
107109
lock-offset = <0x14>;
108110
vco-offset = <0x08>;
109111
clocks = <&cm24mhz>;
110112
};
111113

112114
/* Auxilary oscillator on the core module, clocks the CLCD */
113-
auxosc: auxosc@24M {
115+
auxosc: clock-controller@1c {
114116
compatible = "arm,syscon-icst525";
117+
reg = <0x1c 0x04>;
115118
#clock-cells = <0>;
116119
lock-offset = <0x14>;
117120
vco-offset = <0x1c>;

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