Skip to content

Commit a740624

Browse files
author
Amanda Butler
authored
Copy edit systick_tickless.md
Copy edit for active voice and consistent tense.
1 parent abc2fb1 commit a740624

File tree

1 file changed

+5
-16
lines changed

1 file changed

+5
-16
lines changed

docs/advanced/systick_tickless.md

Lines changed: 5 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -2,25 +2,14 @@
22

33
## SysTick
44

5-
System tick timer (SysTick) is a standard timer available on most Cortex-M cores. Its main purpose is to rise an
6-
interrupt with set frequency (usually 1ms). It can be used to perform any task in the system, but for platforms
7-
utilizing RTOS, including mbed OS, it provides an interval for the OS for counting the time and scheduling tasks.
5+
System tick timer (SysTick) is a standard timer available on most Cortex-M cores. Its main purpose is to rise an interrupt with set frequency (usually 1ms). You can use it to perform any task in the system, but for platforms using RTOS, including Mbed OS, it provides an interval for the OS for counting the time and scheduling tasks.
86

9-
mbed OS uses default SysTick source for most targets, but that can be overridden using the
10-
[Tick API](http://arm-software.github.io/CMSIS_5/RTOS2/html/group__CMSIS__RTOS__TickAPI.html) provided by CMSIS-RTOS2.
7+
Mbed OS uses default SysTick source for most targets, but you can override that using the [Tick API](http://arm-software.github.io/CMSIS_5/RTOS2/html/group__CMSIS__RTOS__TickAPI.html) that CMSIS-RTOS2 provides.
118

129
## Tickless mode
1310

14-
Tickless mode is an optimization mechanism available in RTOS for suspending the SysTick. It can be used in situations
15-
when RTOS will be idle for multiple ticks, allowing to achieve power savings by entering uninterrupted sleep. Targets
16-
implementing tickless mode will disable the SysTick, set up wake-up timer and enter sleep mode when idle. It will then exit
17-
sleep mode and re-enable the SysTick, when the timer expires or some event occurs (like external interrupt).
11+
Tickless mode is an optimization mechanism available in RTOS for suspending the SysTick. You can use it in situations when RTOS is idle for multiple ticks, so you can achieve power savings by entering uninterrupted sleep. Targets implementing tickless mode disable the SysTick, set up wake-up timers and enter sleep mode when idle. It then exits sleep mode and re-enables the SysTick when the timer expires or some event occurs (like external interrupt).
1812

19-
mbed OS supports the tickless mode on multiple targets, they will define `MBED_TICKLESS`
20-
macro in [targets/targets.json](https://github.com/ARMmbed/mbed-os/blob/master/targets/targets.json).
13+
Mbed OS supports the tickless mode on multiple targets. [`targets/targets.json`](https://github.com/ARMmbed/mbed-os/blob/master/targets/targets.json) defines the `MBED_TICKLESS` macro.
2114

22-
Targets supporting tickless mode will override the default SysTick mechanism and use
23-
[RtosTimer](https://github.com/ARMmbed/mbed-os/blob/master/rtos/TARGET_CORTEX/mbed_rtx_idle.cpp) implementation based on
24-
[low power ticker](https://github.com/ARMmbed/mbed-os/blob/master/drivers/LowPowerTicker.h).
25-
This change is necessary to avoid drift connected with using two different timers to measure time. It should be mostly
26-
invisible for users, except that the low power ticker interrupt handler shouldn't be changed when tickless mode is in use.
15+
Targets supporting tickless mode override the default SysTick mechanism and use [RtosTimer](https://github.com/ARMmbed/mbed-os/blob/master/rtos/TARGET_CORTEX/mbed_rtx_idle.cpp) implementation based on [low power ticker](https://github.com/ARMmbed/mbed-os/blob/master/drivers/LowPowerTicker.h). This change is necessary to avoid drift connected with using two different timers to measure time. It should be mostly invisible for users, except that users must not change the low power ticker interrupt handler when tickless mode is in use.

0 commit comments

Comments
 (0)