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| 1 | +/* mbed Microcontroller Library |
| 2 | + * Copyright (c) 2018 ARM Limited |
| 3 | + * |
| 4 | + * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | + * you may not use this file except in compliance with the License. |
| 6 | + * You may obtain a copy of the License at |
| 7 | + * |
| 8 | + * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | + * |
| 10 | + * Unless required by applicable law or agreed to in writing, software |
| 11 | + * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | + * See the License for the specific language governing permissions and |
| 14 | + * limitations under the License. |
| 15 | + */ |
| 16 | + |
| 17 | +#ifndef ATCAECCCONSTANTS_H |
| 18 | +#define ATCAECCCONSTANTS_H |
| 19 | + |
| 20 | +/** Datasheet defined constants */ |
| 21 | +#define ATCA_ECC_508A_I2C_ADDR 0xC0 |
| 22 | +#define ATCA_ECC_508A_REVISION {0x00, 0x00, 0x50, 0x00} |
| 23 | +#define ATCA_ECC_WORD_SZ 4 |
| 24 | +#define ATCA_ECC_STATUS_RESP_LEN 4 |
| 25 | +#define ATCA_ECC_RESP_STATUS_IDX 1 |
| 26 | +#define ATCA_ECC_NUM_PRIV_KEY_SLOTS 8 |
| 27 | +#define ATCA_ECC_ECC_PK_LEN 64 |
| 28 | +#define ATCA_ECC_CONFIG_ZONE_SZ 128 |
| 29 | +#define ATCA_KEY_ID_0 0 |
| 30 | +#define ATCA_ECC_HASH_256_LEN 32 |
| 31 | +#define ATCA_ECC_SIG_LEN 64 |
| 32 | +#define ATCA_ECC_CRC_POLYNOMIAL 0x8005 |
| 33 | +#define ATCA_ECC_NUM_DEVICE_DATA_BLOCKS 4 |
| 34 | + |
| 35 | +/** Device functions */ |
| 36 | +#define ATCA_ECC_FUNC_RST_IO_ADDR 0x00 |
| 37 | +#define ATCA_ECC_FUNC_SLEEP 0x01 |
| 38 | +#define ATCA_ECC_FUNC_IDLE 0x02 |
| 39 | +#define ATCA_ECC_FUNC_COMMAND 0x03 |
| 40 | + |
| 41 | + |
| 42 | +/** EEPROM Zones */ |
| 43 | +enum ATCAZone |
| 44 | +{ |
| 45 | + ATCA_ECC_ZONE_CONFIG = 0x0 |
| 46 | + |
| 47 | + /* Data and OTP zones are not defined here as this driver does not make |
| 48 | + * use of them. */ |
| 49 | +}; |
| 50 | + |
| 51 | +/** Command opcodes */ |
| 52 | +enum ATCAOpCode |
| 53 | +{ |
| 54 | + ATCA_ECC_CMD_OPCODE_READ = 0x02, |
| 55 | + ATCA_ECC_CMD_OPCODE_WRITE = 0x12, |
| 56 | + ATCA_ECC_CMD_OPCODE_LOCK = 0x17, |
| 57 | + ATCA_ECC_CMD_OPCODE_GENKEY = 0x40, |
| 58 | + ATCA_ECC_CMD_OPCODE_NONCE = 0x16, |
| 59 | + ATCA_ECC_CMD_OPCODE_SIGN = 0x41, |
| 60 | + ATCA_ECC_CMD_OPCODE_VERIFY = 0x45, |
| 61 | +}; |
| 62 | + |
| 63 | +/** Key ID/Slot no. Type */ |
| 64 | +typedef uint32_t ATCAKeyID; |
| 65 | +#define ATCA_ECC_KEY_ID_0 0 |
| 66 | +#define ATCA_ECC_KEY_ID_INVALID 0xFFFFFFFF |
| 67 | + |
| 68 | +/** Command and response length */ |
| 69 | +#define ATCA_ECC_CMD_OFFSET 2 /* Command offset in Tx buffer */ |
| 70 | +#define ATCA_ECC_RESP_OFFSET 1 /* Response offset in Rx buffer */ |
| 71 | +#define ATCA_ECC_CRC_INPUT_OFFSET 1 /* CRC input data offset in Tx buffer */ |
| 72 | +#define ATCA_ECC_MAX_CMD_LEN 132 /* Bytes device allocates for constructing command */ |
| 73 | +#define ATCA_ECC_MAX_RESP_LEN 67 /* Bytes device allocates for constructing responce */ |
| 74 | +#define ATCA_ECC_FUNCTION_LEN 1 /* Device function (Write address) */ |
| 75 | +#define ATCA_ECC_CMD_IO_WRAPER_LEN 3 /* Count + CRC */ |
| 76 | +#define ATCA_ECC_CMD_READ_LEN 4 |
| 77 | +#define ATCA_ECC_RESP_READ_LEN 7 |
| 78 | +#define ATCA_ECC_CMD_WRITE_LEN 8 |
| 79 | +#define ATCA_ECC_RESP_WRITE_LEN 4 |
| 80 | +#define ATCA_ECC_CMD_WRITE_LEN 8 |
| 81 | +#define ATCA_ECC_RESP_WRITE_LEN 4 |
| 82 | +#define ATCA_ECC_CMD_LOCK_LEN 4 |
| 83 | +#define ATCA_ECC_STATUS_LEN 4 |
| 84 | +#define ATCA_ECC_CMD_GENKEY_LEN 4 |
| 85 | +#define ATCA_ECC_RESP_GENKEY_LEN 67 |
| 86 | +#define ATCA_ECC_CMD_NONCE_LEN 36 |
| 87 | +#define ATCA_ECC_CMD_SIGN_LEN 4 |
| 88 | +#define ATCA_ECC_RESP_SIGN_LEN 67 |
| 89 | +#define ATCA_ECC_CMD_VERIFY_LEN 132 |
| 90 | + |
| 91 | +/** EEPROM addresses */ |
| 92 | +#define ATCA_ECC_CFG_ADDR_REVISION 4 |
| 93 | +#define ATCA_ECC_CFG_ADDR_SLOT_CFG 20 |
| 94 | +#define ATCA_ECC_CFG_ADDR_KEY_CFG 96 |
| 95 | +#define ATCA_ECC_CFG_ADDR_LCK_CFG 87 |
| 96 | + |
| 97 | +/** Flags */ |
| 98 | +#define ATCA_ECC_FLG_READ_SZ_32 0x80 |
| 99 | + |
| 100 | +/** Devices Delays */ |
| 101 | +#define ATCA_ECC_DELAY_TPU_US 100 |
| 102 | +#define ATCA_ECC_DELAY_TWLO_US 60 |
| 103 | +#define ATCA_ECC_DELAY_TWHI_US 1500 |
| 104 | +#define ATCA_ECC_DELAY_WAKE_TOKEN_RETRY_US 100 |
| 105 | + |
| 106 | +/** Command execution times */ |
| 107 | +#define ATCA_ECC_EXEC_TIME_READ_TYP_US 100 |
| 108 | +#define ATCA_ECC_EXEC_TIME_READ_MAX_US 1000 |
| 109 | +#define ATCA_ECC_EXEC_TIME_WRITE_TYP_US 7000 |
| 110 | +#define ATCA_ECC_EXEC_TIME_WRITE_MAX_US 26000 |
| 111 | +#define ATCA_ECC_EXEC_TIME_LOCK_TYP_US 8000 |
| 112 | +#define ATCA_ECC_EXEC_TIME_LOCK_MAX_US 32000 |
| 113 | +#define ATCA_ECC_EXEC_TIME_GENKEY_TYP_US 11000 |
| 114 | +#define ATCA_ECC_EXEC_TIME_GENKEY_MAX_US 115000 |
| 115 | +#define ATCA_ECC_EXEC_TIME_NONCE_TYP_US 100 |
| 116 | +#define ATCA_ECC_EXEC_TIME_NONCE_MAX_US 7000 |
| 117 | +#define ATCA_ECC_EXEC_TIME_SIGN_TYP_US 42000 |
| 118 | +#define ATCA_ECC_EXEC_TIME_SIGN_MAX_US 50000 |
| 119 | +#define ATCA_ECC_EXEC_TIME_VERIFY_TYP_US 38000 |
| 120 | +#define ATCA_ECC_EXEC_TIME_VERIFY_MAX_US 58000 |
| 121 | + |
| 122 | +/** Driver defined constants */ |
| 123 | +#define ATCA_ECC_I2C_FREQUENCY 10000 |
| 124 | + |
| 125 | +#endif /* ATCAECCCONSTANTS_H */ |
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