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[NANO130] Remove dead code
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8 files changed

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‎targets/TARGET_NUVOTON/TARGET_NANO100/TARGET_NUMAKER_PFM_NANO130/PeripheralPins.c

Lines changed: 0 additions & 113 deletions
Original file line numberDiff line numberDiff line change
@@ -16,119 +16,6 @@
1616

1717
#include "PeripheralPins.h"
1818

19-
// =====
20-
// Note: Commented lines are alternative possibilities which are not used per default.
21-
// If you change them, you will have also to modify the corresponding xxx_api.c file
22-
// for pwmout, analogin, analogout, ...
23-
// =====
24-
25-
#if 0
26-
//*** GPIO ***
27-
const PinMap PinMap_GPIO[] = {
28-
// GPIO A MFPL
29-
{PA_0, GPIO_A, SYS_GPA_MFPL_PA0MFP_GPIO},
30-
{PA_1, GPIO_A, SYS_GPA_MFPL_PA1MFP_GPIO},
31-
{PA_2, GPIO_A, SYS_GPA_MFPL_PA2MFP_GPIO},
32-
{PA_3, GPIO_A, SYS_GPA_MFPL_PA3MFP_GPIO},
33-
{PA_4, GPIO_A, SYS_GPA_MFPL_PA4MFP_GPIO},
34-
{PA_5, GPIO_A, SYS_GPA_MFPL_PA5MFP_GPIO},
35-
{PA_6, GPIO_A, SYS_GPA_MFPL_PA6MFP_GPIO},
36-
{PA_7, GPIO_A, SYS_GPA_MFPL_PA7MFP_GPIO},
37-
// GPIO A MFPH
38-
{PA_8, GPIO_A, SYS_GPA_MFPH_PA8MFP_GPIO},
39-
{PA_9, GPIO_A, SYS_GPA_MFPH_PA9MFP_GPIO},
40-
{PA_10, GPIO_A, SYS_GPA_MFPH_PA10MFP_GPIO},
41-
{PA_11, GPIO_A, SYS_GPA_MFPH_PA11MFP_GPIO},
42-
{PA_12, GPIO_A, SYS_GPA_MFPH_PA12MFP_GPIO},
43-
{PA_13, GPIO_A, SYS_GPA_MFPH_PA13MFP_GPIO},
44-
{PA_14, GPIO_A, SYS_GPA_MFPH_PA14MFP_GPIO},
45-
{PA_15, GPIO_A, SYS_GPA_MFPH_PA15MFP_GPIO},
46-
47-
// GPIO B MFPL
48-
{PB_0, GPIO_B, SYS_GPB_MFPL_PB0MFP_GPIO},
49-
{PB_1, GPIO_B, SYS_GPB_MFPL_PB1MFP_GPIO},
50-
{PB_2, GPIO_B, SYS_GPB_MFPL_PB2MFP_GPIO},
51-
{PB_3, GPIO_B, SYS_GPB_MFPL_PB3MFP_GPIO},
52-
{PB_4, GPIO_B, SYS_GPB_MFPL_PB4MFP_GPIO},
53-
{PB_5, GPIO_B, SYS_GPB_MFPL_PB5MFP_GPIO},
54-
{PB_6, GPIO_B, SYS_GPB_MFPL_PB6MFP_GPIO},
55-
{PB_7, GPIO_B, SYS_GPB_MFPL_PB7MFP_GPIO},
56-
// GPIO B MFPH
57-
{PB_8, GPIO_B, SYS_GPB_MFPH_PB8MFP_GPIO},
58-
{PB_9, GPIO_B, SYS_GPB_MFPH_PB9MFP_GPIO},
59-
{PB_10, GPIO_B, SYS_GPB_MFPH_PB10MFP_GPIO},
60-
{PB_11, GPIO_B, SYS_GPB_MFPH_PB11MFP_GPIO},
61-
{PB_12, GPIO_B, SYS_GPB_MFPH_PB12MFP_GPIO},
62-
{PB_13, GPIO_B, SYS_GPB_MFPH_PB13MFP_GPIO},
63-
{PB_14, GPIO_B, SYS_GPB_MFPH_PB14MFP_GPIO},
64-
{PB_15, GPIO_B, SYS_GPB_MFPH_PB15MFP_GPIO},
65-
66-
// GPIO C MFPL
67-
{PC_0, GPIO_C, SYS_GPC_MFPL_PC0MFP_GPIO},
68-
{PC_1, GPIO_C, SYS_GPC_MFPL_PC1MFP_GPIO},
69-
{PC_2, GPIO_C, SYS_GPC_MFPL_PC2MFP_GPIO},
70-
{PC_3, GPIO_C, SYS_GPC_MFPL_PC3MFP_GPIO},
71-
{PC_4, GPIO_C, SYS_GPC_MFPL_PC4MFP_GPIO},
72-
{PC_5, GPIO_C, SYS_GPC_MFPL_PC5MFP_GPIO},
73-
{PC_6, GPIO_C, SYS_GPC_MFPL_PC6MFP_GPIO},
74-
{PC_7, GPIO_C, SYS_GPC_MFPL_PC7MFP_GPIO},
75-
// GPIO C MFPH
76-
{PC_8, GPIO_C, SYS_GPC_MFPH_PC8MFP_GPIO},
77-
{PC_9, GPIO_C, SYS_GPC_MFPH_PC9MFP_GPIO},
78-
{PC_10, GPIO_C, SYS_GPC_MFPH_PC10MFP_GPIO},
79-
{PC_11, GPIO_C, SYS_GPC_MFPH_PC11MFP_GPIO},
80-
{PC_12, GPIO_C, SYS_GPC_MFPH_PC12MFP_GPIO},
81-
{PC_13, GPIO_C, SYS_GPC_MFPH_PC13MFP_GPIO},
82-
{PC_14, GPIO_C, SYS_GPC_MFPH_PC14MFP_GPIO},
83-
{PC_15, GPIO_C, SYS_GPC_MFPH_PC15MFP_GPIO},
84-
85-
// GPIO D MFPL
86-
{PD_0, GPIO_D, SYS_GPD_MFPL_PD0MFP_GPIO},
87-
{PD_1, GPIO_D, SYS_GPD_MFPL_PD1MFP_GPIO},
88-
{PD_2, GPIO_D, SYS_GPD_MFPL_PD2MFP_GPIO},
89-
{PD_3, GPIO_D, SYS_GPD_MFPL_PD3MFP_GPIO},
90-
{PD_4, GPIO_D, SYS_GPD_MFPL_PD4MFP_GPIO},
91-
{PD_5, GPIO_D, SYS_GPD_MFPL_PD5MFP_GPIO},
92-
{PD_6, GPIO_D, SYS_GPD_MFPL_PD6MFP_GPIO},
93-
{PD_7, GPIO_D, SYS_GPD_MFPL_PD7MFP_GPIO},
94-
// GPIO D MFPH
95-
{PD_8, GPIO_D, SYS_GPD_MFPH_PD8MFP_GPIO},
96-
{PD_9, GPIO_D, SYS_GPD_MFPH_PD9MFP_GPIO},
97-
{PD_10, GPIO_D, SYS_GPD_MFPH_PD10MFP_GPIO},
98-
{PD_11, GPIO_D, SYS_GPD_MFPH_PD11MFP_GPIO},
99-
{PD_12, GPIO_D, SYS_GPD_MFPH_PD12MFP_GPIO},
100-
{PD_13, GPIO_D, SYS_GPD_MFPH_PD13MFP_GPIO},
101-
{PD_14, GPIO_D, SYS_GPD_MFPH_PD14MFP_GPIO},
102-
{PD_15, GPIO_D, SYS_GPD_MFPH_PD15MFP_GPIO},
103-
104-
// GPIO E MFPL
105-
{PE_0, GPIO_E, SYS_GPE_MFPL_PE0MFP_GPIO},
106-
{PE_1, GPIO_E, SYS_GPE_MFPL_PE1MFP_GPIO},
107-
{PE_2, GPIO_E, SYS_GPE_MFPL_PE2MFP_GPIO},
108-
{PE_3, GPIO_E, SYS_GPE_MFPL_PE3MFP_GPIO},
109-
{PE_4, GPIO_E, SYS_GPE_MFPL_PE4MFP_GPIO},
110-
{PE_5, GPIO_E, SYS_GPE_MFPL_PE5MFP_GPIO},
111-
{PE_6, GPIO_E, SYS_GPE_MFPL_PE6MFP_GPIO},
112-
{PE_7, GPIO_E, SYS_GPE_MFPL_PE7MFP_GPIO},
113-
// GPIO E MFPH
114-
{PE_8, GPIO_E, SYS_GPE_MFPH_PE8MFP_GPIO},
115-
{PE_9, GPIO_E, SYS_GPE_MFPH_PE9MFP_GPIO},
116-
{PE_10, GPIO_E, SYS_GPE_MFPH_PE10MFP_GPIO},
117-
{PE_11, GPIO_E, SYS_GPE_MFPH_PE11MFP_GPIO},
118-
{PE_12, GPIO_E, SYS_GPE_MFPH_PE12MFP_GPIO},
119-
{PE_13, GPIO_E, SYS_GPE_MFPH_PE13MFP_GPIO},
120-
{PE_14, GPIO_E, SYS_GPE_MFPH_PE14MFP_GPIO},
121-
122-
// GPIO F MFPL
123-
{PF_0, GPIO_F, SYS_GPF_MFPL_PF0MFP_GPIO},
124-
{PF_1, GPIO_F, SYS_GPF_MFPL_PF1MFP_GPIO},
125-
{PF_2, GPIO_F, SYS_GPF_MFPL_PF2MFP_GPIO},
126-
{PF_3, GPIO_F, SYS_GPF_MFPL_PF3MFP_GPIO},
127-
{PF_4, GPIO_F, SYS_GPF_MFPL_PF4MFP_GPIO},
128-
{PF_5, GPIO_F, SYS_GPF_MFPL_PF5MFP_GPIO},
129-
};
130-
#endif
131-
13219
//*** ADC ***
13320

13421
const PinMap PinMap_ADC[] = {

‎targets/TARGET_NUVOTON/TARGET_NANO100/device/startup_Nano100Series.c

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -28,8 +28,6 @@
2828
void FUN(void) __attribute__ ((weak, alias(#FUN_ALIAS)));
2929

3030
#elif defined(__ICCARM__)
31-
//#define STRINGIFY(x) #x
32-
//#define _STRINGIFY(x) STRINGIFY(x)
3331
#define WEAK_ALIAS_FUNC(FUN, FUN_ALIAS) \
3432
void FUN(void); \
3533
_Pragma(_STRINGIFY(_WEAK_ALIAS_FUNC(FUN, FUN_ALIAS)))
@@ -131,7 +129,6 @@ const uint32_t __vector_handlers[] = {
131129
#if defined(__CC_ARM)
132130
(uint32_t) &Image$$ARM_LIB_STACK$$ZI$$Limit,
133131
#elif defined(__ICCARM__)
134-
//(uint32_t) __sfe("CSTACK"),
135132
(uint32_t) &CSTACK$$Limit,
136133
#elif defined(__GNUC__)
137134
(uint32_t) &__StackTop,

‎targets/TARGET_NUVOTON/TARGET_NANO100/gpio_irq_api.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -86,7 +86,8 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
8686
obj->next = NULL;
8787

8888
GPIO_T *gpio_base = NU_PORT_BASE(port_index);
89-
//gpio_set(pin);
89+
// NOTE: In InterruptIn constructor, gpio_irq_init() is called with gpio_init_in() which is responsible for multi-function pin setting.
90+
// There is no need to call gpio_set() redundantly.
9091

9192
{
9293
#if MBED_CONF_NANO100_GPIO_IRQ_DEBOUNCE_ENABLE

‎targets/TARGET_NUVOTON/TARGET_NANO100/i2c_api.c

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -75,8 +75,6 @@ static int i2c_do_trsn(i2c_t *obj, uint32_t i2c_ctl, int sync);
7575
#define NU_I2C_TIMEOUT_STOP 500000
7676
static int i2c_poll_status_timeout(i2c_t *obj, int (*is_status)(i2c_t *obj), uint32_t timeout);
7777
static int i2c_poll_tran_heatbeat_timeout(i2c_t *obj, uint32_t timeout);
78-
//static int i2c_is_stat_int(i2c_t *obj);
79-
//static int i2c_is_stop_det(i2c_t *obj);
8078
static int i2c_is_trsn_done(i2c_t *obj);
8179
static int i2c_is_tran_started(i2c_t *obj);
8280
static int i2c_addr2data(int address, int read);
@@ -551,8 +549,6 @@ static int i2c_is_trsn_done(i2c_t *obj)
551549
int inten_back;
552550

553551
inten_back = i2c_set_int(obj, 0);
554-
// NUC472/M453/M487
555-
//i2c_int = !! (i2c_base->CON & I2C_CON_I2C_STS_Msk);
556552
// NANO130
557553
i2c_int = !! (i2c_base->INTSTS & I2C_INTSTS_INTSTS_Msk);
558554
status = I2C_GET_STATUS(i2c_base);
@@ -859,8 +855,6 @@ void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx,
859855
obj->i2c.event = event;
860856
i2c_buffer_set(obj, tx, tx_length, rx, rx_length);
861857

862-
//I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
863-
864858
obj->i2c.hdlr_async = handler;
865859
i2c_start(obj);
866860
}

‎targets/TARGET_NUVOTON/TARGET_NANO100/pinmap.c

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -28,20 +28,10 @@ void pin_function(PinName pin, int data)
2828
uint32_t pin_index = NU_PINNAME_TO_PIN(pin);
2929
uint32_t port_index = NU_PINNAME_TO_PORT(pin);
3030
__IO uint32_t *Px_x_MFP = ((__IO uint32_t *) &SYS->PA_L_MFP) + port_index * 2 + (pin_index / 8);
31-
//uint32_t MFP_Pos = NU_MFP_POS(pin_index);
3231
uint32_t MFP_Msk = NU_MFP_MSK(pin_index);
3332

3433
// E.g.: SYS->PA_L_MFP = (SYS->PA_L_MFP & (~SYS_PA_L_MFP_PA0_MFP_Msk) ) | SYS_PA_L_MFP_PA0_MFP_SC0_CD ;
3534
*Px_x_MFP = (*Px_x_MFP & (~MFP_Msk)) | data;
36-
37-
// [TODO] Disconnect JTAG-DP + SW-DP signals.
38-
// Warning: Need to reconnect under reset
39-
//if ((pin == PA_13) || (pin == PA_14)) {
40-
//
41-
//}
42-
//if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) {
43-
//
44-
//}
4535
}
4636

4737
/**

‎targets/TARGET_NUVOTON/TARGET_NANO100/pwmout_api.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -201,8 +201,10 @@ static void pwmout_config(pwmout_t* obj)
201201
PWM_T *pwm_base = (PWM_T *) NU_MODBASE(obj->pwm);
202202
uint32_t chn = NU_MODSUBINDEX(obj->pwm);
203203
// NOTE: Support period < 1s
204-
//PWM_ConfigOutputChannel(pwm_base, chn, 1000 * 1000 / obj->period_us, obj->pulsewidth_us * 100 / obj->period_us);
205-
// enable inverter to ensure the first PWM cycle is correct
204+
// NOTE: ARM mbed CI test fails due to first PWM pulse error. Workaround by:
205+
// 1. Inverse duty cycle (100 - duty)
206+
// 2. Inverse PWM output polarity
207+
// This trick is here to pass ARM mbed CI test. First PWM pulse error still remains.
206208
PWM_ConfigOutputChannel2(pwm_base, chn, 1000 * 1000, 100 - (obj->pulsewidth_us * 100 / obj->period_us), obj->period_us);
207209
}
208210

‎targets/TARGET_NUVOTON/TARGET_NANO100/sleep.c

Lines changed: 2 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,6 @@ void hal_deepsleep(void)
5757

5858
static void mbed_enter_sleep(struct sleep_s *obj)
5959
{
60-
#if 0
6160
// Check if serial allows entering power-down mode
6261
if (obj->powerdown) {
6362
obj->powerdown = serial_allow_powerdown();
@@ -75,14 +74,12 @@ static void mbed_enter_sleep(struct sleep_s *obj)
7574
obj->powerdown = pwmout_allow_powerdown();
7675
}
7776
// TODO: Check if other peripherals allow entering power-down mode
78-
#endif
79-
77+
8078
if (obj->powerdown) { // Power-down mode (HIRC/HXT disabled, LIRC/LXT enabled)
8179
SYS_UnlockReg();
8280
CLK_PowerDown();
8381
SYS_LockReg();
84-
}
85-
else { // CPU halt mode (HIRC/HXT enabled, LIRC/LXT enabled)
82+
} else { // CPU halt mode (HIRC/HXT enabled, LIRC/LXT enabled)
8683
SYS_UnlockReg();
8784
CLK_Idle();
8885
SYS_LockReg();
@@ -95,8 +92,6 @@ static void mbed_enter_sleep(struct sleep_s *obj)
9592

9693
static void mbed_exit_sleep(struct sleep_s *obj)
9794
{
98-
// TODO: TO BE CONTINUED
99-
10095
(void)obj;
10196
}
10297

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