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Renesas : Improve Flash iap
I modified the _page_program() because when the request of the size exceeding the maximum size(256 byte) per one writing of Flash recieved, it was not able to loop the writing with sifting the address every 256 byte. Also I modified the return value of flash_get_page_size() because I found that the minimum size per one writing of Flash is 1 byte by reviewing Flash spec. "FLASH_PAGE_SIZE" macro's value is remain 256, it doesn't be used at flash_get_page_size(), used at _page_program() for refferencing of the maximum page size.
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3 files changed

+58
-33
lines changed

3 files changed

+58
-33
lines changed

targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/mbed_drv_cfg.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,7 @@
4040
#define FLASH_BASE (0x18000000UL) /**< Flash Base Address */
4141
#define FLASH_SIZE (0x00800000UL) /**< Available Flash Memory */
4242
#define FLASH_PAGE_SIZE 256 /**< Flash Memory page size (interleaving off) */
43+
/**< Maximum size per one writing is 256 byte and minimum size per one writing is 1 byte */
4344
#define FLASH_SECTOR_SIZE 4096 /**< Flash Memory sector size (interleaving off) */
4445

4546
#endif

targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/mbed_drv_cfg.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,7 @@
4040
#define FLASH_BASE (0x18000000UL) /**< Flash Base Address */
4141
#define FLASH_SIZE (0x00800000UL) /**< Available Flash Memory */
4242
#define FLASH_PAGE_SIZE 256 /**< Flash Memory page size (interleaving off) */
43+
/**< Maximum size per one writing is 256 byte and minimum size per one writing is 1 byte */
4344
#define FLASH_SECTOR_SIZE 4096 /**< Flash Memory sector size (interleaving off) */
4445

4546
#endif

targets/TARGET_RENESAS/TARGET_RZ_A1XX/flash_api.c

Lines changed: 56 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -167,7 +167,7 @@ uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address)
167167

168168
uint32_t flash_get_page_size(const flash_t *obj)
169169
{
170-
return FLASH_PAGE_SIZE;
170+
return 1;
171171
}
172172

173173
uint32_t flash_get_start_address(const flash_t *obj)
@@ -222,48 +222,71 @@ int32_t _sector_erase(uint32_t addr)
222222
int32_t _page_program(uint32_t addr, const uint8_t * buf, int32_t size)
223223
{
224224
int32_t ret;
225+
int32_t program_size;
226+
int32_t remainder;
227+
int32_t idx = 0;
225228

226229
spi_mode();
227230

228-
/* ---- Write enable ---- */
229-
ret = write_enable(); /* WREN Command */
230-
if (ret != 0) {
231-
ex_mode();
232-
return ret;
233-
}
231+
while (size > 0) {
232+
if (size > FLASH_PAGE_SIZE) {
233+
program_size = FLASH_PAGE_SIZE;
234+
} else {
235+
program_size = size;
236+
}
237+
remainder = FLASH_PAGE_SIZE - (addr % FLASH_PAGE_SIZE);
238+
if ((remainder != 0) && (program_size > remainder)) {
239+
program_size = remainder;
240+
}
234241

235-
/* ----------- 1. Command, Address ---------------*/
236-
/* ---- spimd_reg init ---- */
237-
clear_spimd_reg(&spimd_reg);
242+
/* ---- Write enable ---- */
243+
ret = write_enable(); /* WREN Command */
244+
if (ret != 0) {
245+
ex_mode();
246+
return ret;
247+
}
238248

239-
/* ---- command ---- */
240-
spimd_reg.cde = SPIBSC_OUTPUT_ENABLE;
241-
spimd_reg.cdb = SPIBSC_1BIT;
242-
spimd_reg.cmd = SFLASHCMD_PAGE_PROGRAM;
249+
/* ----------- 1. Command, Address ---------------*/
250+
/* ---- spimd_reg init ---- */
251+
clear_spimd_reg(&spimd_reg);
243252

244-
/* ---- address ---- */
245-
spimd_reg.ade = SPIBSC_OUTPUT_ADDR_24;
246-
spimd_reg.addre = SPIBSC_SDR_TRANS; /* SDR */
247-
spimd_reg.adb = SPIBSC_1BIT;
248-
spimd_reg.addr = addr;
253+
/* ---- command ---- */
254+
spimd_reg.cde = SPIBSC_OUTPUT_ENABLE;
255+
spimd_reg.cdb = SPIBSC_1BIT;
256+
spimd_reg.cmd = SFLASHCMD_PAGE_PROGRAM;
249257

250-
/* ---- Others ---- */
251-
spimd_reg.sslkp = SPIBSC_SPISSL_KEEP; /* SPBSSL level */
258+
/* ---- address ---- */
259+
spimd_reg.ade = SPIBSC_OUTPUT_ADDR_24;
260+
spimd_reg.addre = SPIBSC_SDR_TRANS; /* SDR */
261+
spimd_reg.adb = SPIBSC_1BIT;
262+
spimd_reg.addr = addr;
252263

253-
ret = spibsc_transfer(&spimd_reg); /* Command,Address */
254-
if (ret != 0) {
255-
ex_mode();
256-
return ret;
257-
}
264+
/* ---- Others ---- */
265+
spimd_reg.sslkp = SPIBSC_SPISSL_KEEP; /* SPBSSL level */
258266

259-
/* ----------- 2. Data ---------------*/
260-
ret = data_send(SPIBSC_1BIT, SPIBSC_SPISSL_NEGATE, buf, size);
261-
if (ret != 0) {
262-
ex_mode();
263-
return ret;
264-
}
267+
ret = spibsc_transfer(&spimd_reg); /* Command,Address */
268+
if (ret != 0) {
269+
ex_mode();
270+
return ret;
271+
}
265272

266-
ret = busy_wait();
273+
/* ----------- 2. Data ---------------*/
274+
ret = data_send(SPIBSC_1BIT, SPIBSC_SPISSL_NEGATE, &buf[idx], program_size);
275+
if (ret != 0) {
276+
ex_mode();
277+
return ret;
278+
}
279+
280+
ret = busy_wait();
281+
if (ret != 0) {
282+
ex_mode();
283+
return ret;
284+
}
285+
286+
addr += program_size;
287+
idx += program_size;
288+
size -= program_size;
289+
}
267290

268291
ex_mode();
269292
return ret;

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