Add support for QSPI on DISCO_L476VG

Author: adustm

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PeripheralNames.h

@@ -83,6 +83,10 @@ typedef enum {
     CAN_1 = (int)CAN1_BASE
 } CANName;
 
+typedef enum {
+    QSPI_1 = (int)QSPI_R_BASE,
+} QSPIName;
+
 #ifdef __cplusplus
 }
 #endif

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PeripheralPins.c

@@ -340,3 +340,29 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = {
     {PD_1,       CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // Connected to MEMS_SCK [L3GD20_SCL/SPC]
     {NC, NC, 0}
 };
+
+//*** QUADSPI ***
+
+MBED_WEAK const PinMap PinMap_QSPI_DATA[] = {
+    {PA_6,       QSPI_1,    STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO3 not connected
+    {PA_7,       QSPI_1,    STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO2 not connected
+    {PB_0,       QSPI_1,    STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO1 not connected
+    {PB_1,       QSPI_1,    STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO0 not connected
+    {PE_12,      QSPI_1,    STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO0 connected to N25Q128
+    {PE_13,      QSPI_1,    STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO1 connected to N25Q128
+    {PE_14,      QSPI_1,    STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO2 connected to N25Q128
+    {PE_15,      QSPI_1,    STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO3 connected to N25Q128
+    {NC, NC, 0}
+};
+
+MBED_WEAK const PinMap PinMap_QSPI_SCLK[] = {
+//  {PB_10,      QSPI_1,    STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
+    {PE_10,      QSPI_1,    STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // connected to N25Q128
+    {NC, NC, 0}
+};
+
+MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
+//  {PB_11,      QSPI_1,    STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
+    {PE_11,      QSPI_1,    STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // connected to N25Q128
+    {NC, NC, 0}
+};

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/objects.h

@@ -58,6 +58,10 @@ struct trng_s {
     RNG_HandleTypeDef handle;
 };
 
+struct qspi_s {
+    QSPI_HandleTypeDef handle;
+};
+
 #include "common_objects.h"
 
 #ifdef __cplusplus

targets/targets.json

@@ -2040,7 +2040,7 @@
         },
         "detect_code": ["0820"],
         "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"],
-        "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_FC", "TRNG", "FLASH"],
+        "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_FC", "TRNG", "FLASH", "QSPI"],
         "release_versions": ["2", "5"],
         "device_name": "STM32L476VG",
         "bootloader_supported": true