ARM CM3DS: Align RAM for ARM linker

kjbracey · kjbracey · commit 069951206666 · 2019-04-25T14:14:08.000+03:00
diff --git a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct
@@ -52,7 +52,7 @@ LR_IROM2 ZBT_SSRAM1_START ZBT_SSRAM1_SIZE {
   }
   ; At execution, RAM is set to be in ZBT SSRAM2 and 3, just after the vector
   ; table previously moved from Flash.
-  RW_IRAM1 (ZBT_SSRAM23_START + NVIC_VECTORS_SIZE) (ZBT_SSRAM23_SIZE - NVIC_VECTORS_SIZE)  {
+  RW_IRAM1 (ZBT_SSRAM23_START + AlignExpr(NVIC_VECTORS_SIZE,8)) (ZBT_SSRAM23_SIZE - AlignExpr(NVIC_VECTORS_SIZE,8))  {
    .ANY (+RW +ZI)
   }
 }

Original file line number	Diff line number	Diff line change
`@@ -52,7 +52,7 @@ LR_IROM2 ZBT_SSRAM1_START ZBT_SSRAM1_SIZE {`
`52`	`52`	`}`
`53`	`53`	`; At execution, RAM is set to be in ZBT SSRAM2 and 3, just after the vector`
`54`	`54`	`; table previously moved from Flash.`
`55`		`- RW_IRAM1 (ZBT_SSRAM23_START + NVIC_VECTORS_SIZE) (ZBT_SSRAM23_SIZE - NVIC_VECTORS_SIZE) {`
	`55`	`+ RW_IRAM1 (ZBT_SSRAM23_START + AlignExpr(NVIC_VECTORS_SIZE,8)) (ZBT_SSRAM23_SIZE - AlignExpr(NVIC_VECTORS_SIZE,8)) {`
`56`	`56`	`.ANY (+RW +ZI)`
`57`	`57`	`}`
`58`	`58`	`}`