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Commit 08051f5

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Deepika
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SiLabs: Fix alignment of execute region to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to remove deprecated flags all linker files (GCC and IAR as well to have uniformity) should strictly align to 8-byte boundary
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21 files changed

+115
-115
lines changed

21 files changed

+115
-115
lines changed

‎targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
1717
*(InRoot$$Sections)
1818
.ANY (+RO)
1919
}
20-
RW_IRAM1 0x200000DC 0x0001FF24 { ; RW data
20+
RW_IRAM1 0x200000E0 0x0001FF20 { ; RW data
2121
.ANY (+RW +ZI)
2222
}
2323
}

‎targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
1717
*(InRoot$$Sections)
1818
.ANY (+RO)
1919
}
20-
RW_IRAM1 0x200000DC 0x0001FF24 { ; RW data
20+
RW_IRAM1 0x200000E0 0x0001FF20 { ; RW data
2121
.ANY (+RW +ZI)
2222
}
2323
}

‎targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,8 @@ MEMORY
3030
}
3131
/* MBED: mbed needs to be able to dynamically set the interrupt vector table.
3232
* We make room for the table at the very beginning of RAM, i.e. at
33-
* 0x20000000. We need (16+39) * sizeof(uint32_t) = 220 bytes for EFM32GG */
34-
__vector_size = 0xDC;
33+
* 0x20000000. We need (16+39) * sizeof(uint32_t) = 220 4(8-byte aligned) bytes for EFM32GG */
34+
__vector_size = 0xE0;
3535

3636
/* Linker script to place sections and symbol values. Should be used together
3737
* with other linker script that defines memory regions FLASH and RAM.
@@ -119,7 +119,7 @@ SECTIONS
119119
/*
120120
.copy.table :
121121
{
122-
. = ALIGN(4);
122+
. = ALIGN(8);
123123
__copy_table_start__ = .;
124124
LONG (__etext)
125125
LONG (__data_start__)
@@ -137,7 +137,7 @@ SECTIONS
137137
/*
138138
.zero.table :
139139
{
140-
. = ALIGN(4);
140+
. = ALIGN(8);
141141
__zero_table_start__ = .;
142142
LONG (__bss_start__)
143143
LONG (__bss_end__ - __bss_start__)
@@ -160,31 +160,31 @@ SECTIONS
160160
PROVIDE( __end_vector_table__ = .);
161161
*(vtable)
162162
*(.data*)
163-
. = ALIGN (4);
163+
. = ALIGN (8);
164164
*(.ram)
165165

166-
. = ALIGN(4);
166+
. = ALIGN(8);
167167
/* preinit data */
168168
PROVIDE_HIDDEN (__preinit_array_start = .);
169169
KEEP(*(.preinit_array))
170170
PROVIDE_HIDDEN (__preinit_array_end = .);
171171

172-
. = ALIGN(4);
172+
. = ALIGN(8);
173173
/* init data */
174174
PROVIDE_HIDDEN (__init_array_start = .);
175175
KEEP(*(SORT(.init_array.*)))
176176
KEEP(*(.init_array))
177177
PROVIDE_HIDDEN (__init_array_end = .);
178178

179-
. = ALIGN(4);
179+
. = ALIGN(8);
180180
/* finit data */
181181
PROVIDE_HIDDEN (__fini_array_start = .);
182182
KEEP(*(SORT(.fini_array.*)))
183183
KEEP(*(.fini_array))
184184
PROVIDE_HIDDEN (__fini_array_end = .);
185185

186186
KEEP(*(.jcr*))
187-
. = ALIGN(4);
187+
. = ALIGN(8);
188188
/* All data end */
189189
__data_end__ = .;
190190

@@ -206,11 +206,11 @@ SECTIONS
206206

207207
.bss :
208208
{
209-
. = ALIGN(4);
209+
. = ALIGN(8);
210210
__bss_start__ = .;
211211
*(.bss*)
212212
*(COMMON)
213-
. = ALIGN(4);
213+
. = ALIGN(8);
214214
__bss_end__ = .;
215215
} > RAM
216216

‎targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,8 @@ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
1111
define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
1212
define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
1313
define symbol __NVIC_start__ = 0x20000000;
14-
define symbol __NVIC_end__ = 0x200000DB;
15-
define symbol __ICFEDIT_region_RAM_start__ = 0x200000DC;
14+
define symbol __NVIC_end__ = 0x200000DF;
15+
define symbol __ICFEDIT_region_RAM_start__ = 0x200000E0;
1616
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
1717
/*-Sizes-*/
1818
/*Heap 1/4 of ram and stack 1/8*/

‎targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -113,7 +113,7 @@ SECTIONS
113113
/*
114114
.copy.table :
115115
{
116-
. = ALIGN(4);
116+
. = ALIGN(8);
117117
__copy_table_start__ = .;
118118
LONG (__etext)
119119
LONG (__data_start__)
@@ -131,7 +131,7 @@ SECTIONS
131131
/*
132132
.zero.table :
133133
{
134-
. = ALIGN(4);
134+
. = ALIGN(8);
135135
__zero_table_start__ = .;
136136
LONG (__bss_start__)
137137
LONG (__bss_end__ - __bss_start__)
@@ -151,43 +151,43 @@ SECTIONS
151151
PROVIDE( __end_vector_table__ = .);
152152
*(vtable)
153153
*(.data*)
154-
. = ALIGN (4);
154+
. = ALIGN (8);
155155
*(.ram)
156156

157-
. = ALIGN(4);
157+
. = ALIGN(8);
158158
/* preinit data */
159159
PROVIDE_HIDDEN (__preinit_array_start = .);
160160
KEEP(*(.preinit_array))
161161
PROVIDE_HIDDEN (__preinit_array_end = .);
162162

163-
. = ALIGN(4);
163+
. = ALIGN(8);
164164
/* init data */
165165
PROVIDE_HIDDEN (__init_array_start = .);
166166
KEEP(*(SORT(.init_array.*)))
167167
KEEP(*(.init_array))
168168
PROVIDE_HIDDEN (__init_array_end = .);
169169

170-
. = ALIGN(4);
170+
. = ALIGN(8);
171171
/* finit data */
172172
PROVIDE_HIDDEN (__fini_array_start = .);
173173
KEEP(*(SORT(.fini_array.*)))
174174
KEEP(*(.fini_array))
175175
PROVIDE_HIDDEN (__fini_array_end = .);
176176

177177
KEEP(*(.jcr*))
178-
. = ALIGN(4);
178+
. = ALIGN(8);
179179
/* All data end */
180180
__data_end__ = .;
181181

182182
} > RAM
183183

184184
.bss :
185185
{
186-
. = ALIGN(4);
186+
. = ALIGN(8);
187187
__bss_start__ = .;
188188
*(.bss*)
189189
*(COMMON)
190-
. = ALIGN(4);
190+
. = ALIGN(8);
191191
__bss_end__ = .;
192192
} > RAM
193193

‎targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_ARM_MICRO/efm32hg.sct

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
1717
*(InRoot$$Sections)
1818
.ANY (+RO)
1919
}
20-
RW_IRAM1 0x20000094 0x00001F6C { ; RW data
20+
RW_IRAM1 0x20000098 0x00001F68 { ; RW data
2121
.ANY (+RW +ZI)
2222
}
2323
}

‎targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_GCC_ARM/efm32hg.ld

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -25,8 +25,8 @@ MEMORY
2525

2626
/* MBED: mbed needs to be able to dynamically set the interrupt vector table.
2727
* We make room for the table at the very beginning of RAM, i.e. at
28-
* 0x20000000. We need (16+21) * sizeof(uint32_t) = 148 bytes for EFM32HG */
29-
__vector_size = 0x94;
28+
* 0x20000000. We need (16+21) * sizeof(uint32_t) = 148+4(8-byte aligned) bytes for EFM32HG */
29+
__vector_size = 0x98;
3030

3131
/* Linker script to place sections and symbol values. Should be used together
3232
* with other linker script that defines memory regions FLASH and RAM.
@@ -113,7 +113,7 @@ SECTIONS
113113
/*
114114
.copy.table :
115115
{
116-
. = ALIGN(4);
116+
. = ALIGN(8);
117117
__copy_table_start__ = .;
118118
LONG (__etext)
119119
LONG (__data_start__)
@@ -131,7 +131,7 @@ SECTIONS
131131
/*
132132
.zero.table :
133133
{
134-
. = ALIGN(4);
134+
. = ALIGN(8);
135135
__zero_table_start__ = .;
136136
LONG (__bss_start__)
137137
LONG (__bss_end__ - __bss_start__)
@@ -152,43 +152,43 @@ SECTIONS
152152
PROVIDE( __end_vector_table__ = .);
153153
*(vtable)
154154
*(.data*)
155-
. = ALIGN (4);
155+
. = ALIGN (8);
156156
*(.ram)
157157

158-
. = ALIGN(4);
158+
. = ALIGN(8);
159159
/* preinit data */
160160
PROVIDE_HIDDEN (__preinit_array_start = .);
161161
KEEP(*(.preinit_array))
162162
PROVIDE_HIDDEN (__preinit_array_end = .);
163163

164-
. = ALIGN(4);
164+
. = ALIGN(8);
165165
/* init data */
166166
PROVIDE_HIDDEN (__init_array_start = .);
167167
KEEP(*(SORT(.init_array.*)))
168168
KEEP(*(.init_array))
169169
PROVIDE_HIDDEN (__init_array_end = .);
170170

171-
. = ALIGN(4);
171+
. = ALIGN(8);
172172
/* finit data */
173173
PROVIDE_HIDDEN (__fini_array_start = .);
174174
KEEP(*(SORT(.fini_array.*)))
175175
KEEP(*(.fini_array))
176176
PROVIDE_HIDDEN (__fini_array_end = .);
177177

178178
KEEP(*(.jcr*))
179-
. = ALIGN(4);
179+
. = ALIGN(8);
180180
/* All data end */
181181
__data_end__ = .;
182182

183183
} > RAM
184184

185185
.bss :
186186
{
187-
. = ALIGN(4);
187+
. = ALIGN(8);
188188
__bss_start__ = .;
189189
*(.bss*)
190190
*(COMMON)
191-
. = ALIGN(4);
191+
. = ALIGN(8);
192192
__bss_end__ = .;
193193
} > RAM
194194

‎targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_IAR/efm32hg322f64.icf

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,8 @@ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
1111
define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
1212
define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
1313
define symbol __NVIC_start__ = 0x20000000;
14-
define symbol __NVIC_end__ = 0x20000093;
15-
define symbol __ICFEDIT_region_RAM_start__ = 0x20000094;
14+
define symbol __NVIC_end__ = 0x20000097;
15+
define symbol __ICFEDIT_region_RAM_start__ = 0x20000098;
1616
define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF;
1717
/*-Sizes-*/
1818
/*Heap 1/4 of ram and stack 1/8*/

‎targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32lg.ld

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,7 @@ SECTIONS
112112
/*
113113
.copy.table :
114114
{
115-
. = ALIGN(4);
115+
. = ALIGN(8);
116116
__copy_table_start__ = .;
117117
LONG (__etext)
118118
LONG (__data_start__)
@@ -130,7 +130,7 @@ SECTIONS
130130
/*
131131
.zero.table :
132132
{
133-
. = ALIGN(4);
133+
. = ALIGN(8);
134134
__zero_table_start__ = .;
135135
LONG (__bss_start__)
136136
LONG (__bss_end__ - __bss_start__)
@@ -151,43 +151,43 @@ SECTIONS
151151
PROVIDE( __end_vector_table__ = .);
152152
*(vtable)
153153
*(.data*)
154-
. = ALIGN (4);
154+
. = ALIGN (8);
155155
*(.ram)
156156

157-
. = ALIGN(4);
157+
. = ALIGN(8);
158158
/* preinit data */
159159
PROVIDE_HIDDEN (__preinit_array_start = .);
160160
KEEP(*(.preinit_array))
161161
PROVIDE_HIDDEN (__preinit_array_end = .);
162162

163-
. = ALIGN(4);
163+
. = ALIGN(8);
164164
/* init data */
165165
PROVIDE_HIDDEN (__init_array_start = .);
166166
KEEP(*(SORT(.init_array.*)))
167167
KEEP(*(.init_array))
168168
PROVIDE_HIDDEN (__init_array_end = .);
169169

170-
. = ALIGN(4);
170+
. = ALIGN(8);
171171
/* finit data */
172172
PROVIDE_HIDDEN (__fini_array_start = .);
173173
KEEP(*(SORT(.fini_array.*)))
174174
KEEP(*(.fini_array))
175175
PROVIDE_HIDDEN (__fini_array_end = .);
176176

177177
KEEP(*(.jcr*))
178-
. = ALIGN(4);
178+
. = ALIGN(8);
179179
/* All data end */
180180
__data_end__ = .;
181181

182182
} > RAM
183183

184184
.bss :
185185
{
186-
. = ALIGN(4);
186+
. = ALIGN(8);
187187
__bss_start__ = .;
188188
*(.bss*)
189189
*(COMMON)
190-
. = ALIGN(4);
190+
. = ALIGN(8);
191191
__bss_end__ = .;
192192
} > RAM
193193

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