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| 1 | +/* mbed Microcontroller Library |
| 2 | + * Copyright (c) 2015-2016 Nuvoton |
| 3 | + * |
| 4 | + * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | + * you may not use this file except in compliance with the License. |
| 6 | + * You may obtain a copy of the License at |
| 7 | + * |
| 8 | + * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | + * |
| 10 | + * Unless required by applicable law or agreed to in writing, software |
| 11 | + * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | + * See the License for the specific language governing permissions and |
| 14 | + * limitations under the License. |
| 15 | + */ |
| 16 | + |
| 17 | + #include "can_api.h" |
| 18 | + #include "m451_gpio.h" |
| 19 | + #include "m451_can.h" |
| 20 | + |
| 21 | + #if DEVICE_CAN |
| 22 | + #include <string.h> |
| 23 | + #include "cmsis.h" |
| 24 | + #include "pinmap.h" |
| 25 | + #include "PeripheralPins.h" |
| 26 | + #include "nu_modutil.h" |
| 27 | + #include "nu_miscutil.h" |
| 28 | + #include "nu_bitutil.h" |
| 29 | + #include "critical.h" |
| 30 | + |
| 31 | + #define NU_CAN_DEBUG 0 |
| 32 | + #define CAN_NUM 1 |
| 33 | + |
| 34 | + static uint32_t can_irq_ids[CAN_NUM] = {0}; |
| 35 | + static can_irq_handler can0_irq_handler; |
| 36 | + |
| 37 | + |
| 38 | + static const struct nu_modinit_s can_modinit_tab[] = { |
| 39 | + {CAN_0, CAN0_MODULE, 0, 0, CAN0_RST, CAN0_IRQn, NULL}, |
| 40 | + |
| 41 | + {NC, 0, 0, 0, 0, (IRQn_Type) 0, NULL} |
| 42 | +}; |
| 43 | + |
| 44 | + |
| 45 | + void can_init(can_t *obj, PinName rd, PinName td) |
| 46 | + { |
| 47 | + uint32_t can_td = (CANName)pinmap_peripheral(td, PinMap_CAN_TD); |
| 48 | + uint32_t can_rd = (CANName)pinmap_peripheral(rd, PinMap_CAN_RD); |
| 49 | + obj->can = (CANName)pinmap_merge(can_td, can_rd); |
| 50 | + MBED_ASSERT((int)obj->can != NC); |
| 51 | + |
| 52 | + const struct nu_modinit_s *modinit = get_modinit(obj->can, can_modinit_tab); |
| 53 | + MBED_ASSERT(modinit != NULL); |
| 54 | + MBED_ASSERT(modinit->modname == obj->can); |
| 55 | + |
| 56 | + // Reset this module |
| 57 | + SYS_ResetModule(modinit->rsetidx); |
| 58 | + |
| 59 | + // Enable IP clock |
| 60 | + CLK_EnableModuleClock(modinit->clkidx); |
| 61 | + |
| 62 | + obj->index = 0; |
| 63 | + |
| 64 | + pinmap_pinout(td, PinMap_CAN_TD); |
| 65 | + pinmap_pinout(rd, PinMap_CAN_RD); |
| 66 | + |
| 67 | + /* For M453 mbed Board Transmitter Setting (RS Pin) */ |
| 68 | + GPIO_SetMode(PA, BIT0| BIT1, GPIO_MODE_OUTPUT); |
| 69 | + PA0 = 0x00; |
| 70 | + PA1 = 0x00; |
| 71 | + |
| 72 | + CAN_Open((CAN_T *)obj->can, 500000, CAN_NORMAL_MODE); |
| 73 | + |
| 74 | + can_filter(obj, 0, 0, CANStandard, 0); |
| 75 | + } |
| 76 | + |
| 77 | + |
| 78 | +void can_free(can_t *obj) |
| 79 | +{ |
| 80 | + |
| 81 | + const struct nu_modinit_s *modinit = get_modinit(obj->can, can_modinit_tab); |
| 82 | + |
| 83 | + MBED_ASSERT(modinit != NULL); |
| 84 | + MBED_ASSERT(modinit->modname == obj->can); |
| 85 | + |
| 86 | + // Reset this module |
| 87 | + SYS_ResetModule(modinit->rsetidx); |
| 88 | + |
| 89 | + CLK_DisableModuleClock(modinit->clkidx); |
| 90 | +} |
| 91 | + |
| 92 | +int can_frequency(can_t *obj, int hz) |
| 93 | +{ |
| 94 | + CAN_SetBaudRate((CAN_T *)obj->can, hz); |
| 95 | + |
| 96 | + return CAN_GetCANBitRate((CAN_T *)obj->can); |
| 97 | +} |
| 98 | + |
| 99 | +static void can_irq(CANName name, int id) |
| 100 | +{ |
| 101 | + |
| 102 | + CAN_T *can = (CAN_T *)NU_MODBASE(name); |
| 103 | + uint32_t u8IIDRstatus; |
| 104 | + |
| 105 | + u8IIDRstatus = can->IIDR; |
| 106 | + |
| 107 | + if(u8IIDRstatus == 0x00008000) { /* Check Status Interrupt Flag (Error status Int and Status change Int) */ |
| 108 | + /**************************/ |
| 109 | + /* Status Change interrupt*/ |
| 110 | + /**************************/ |
| 111 | + if(can->STATUS & CAN_STATUS_RXOK_Msk) { |
| 112 | + can->STATUS &= ~CAN_STATUS_RXOK_Msk; /* Clear Rx Ok status*/ |
| 113 | + can0_irq_handler(can_irq_ids[id], IRQ_RX); |
| 114 | + } |
| 115 | + |
| 116 | + if(can->STATUS & CAN_STATUS_TXOK_Msk) { |
| 117 | + can->STATUS &= ~CAN_STATUS_TXOK_Msk; /* Clear Tx Ok status*/ |
| 118 | + can0_irq_handler(can_irq_ids[id], IRQ_TX); |
| 119 | + } |
| 120 | + |
| 121 | + /**************************/ |
| 122 | + /* Error Status interrupt */ |
| 123 | + /**************************/ |
| 124 | + if(can->STATUS & CAN_STATUS_EWARN_Msk) { |
| 125 | + can0_irq_handler(can_irq_ids[id], IRQ_ERROR); |
| 126 | + } |
| 127 | + |
| 128 | + if(can->STATUS & CAN_STATUS_BOFF_Msk) { |
| 129 | + can0_irq_handler(can_irq_ids[id], IRQ_BUS); |
| 130 | + } |
| 131 | + } else if (u8IIDRstatus!=0) { |
| 132 | + |
| 133 | + can0_irq_handler(can_irq_ids[id], IRQ_OVERRUN); |
| 134 | + |
| 135 | + CAN_CLR_INT_PENDING_BIT(can, ((can->IIDR) -1)); /* Clear Interrupt Pending */ |
| 136 | + |
| 137 | + } else if(can->WU_STATUS == 1) { |
| 138 | + |
| 139 | + can->WU_STATUS = 0; /* Write '0' to clear */ |
| 140 | + can0_irq_handler(can_irq_ids[id], IRQ_WAKEUP); |
| 141 | + } |
| 142 | +} |
| 143 | + |
| 144 | +void CAN0_IRQHandler(void) |
| 145 | +{ |
| 146 | + can_irq(CAN_0, 0); |
| 147 | +} |
| 148 | + |
| 149 | +void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id) |
| 150 | +{ |
| 151 | + can0_irq_handler = handler; |
| 152 | + can_irq_ids[obj->index] = id; |
| 153 | +} |
| 154 | + |
| 155 | +void can_irq_free(can_t *obj) |
| 156 | +{ |
| 157 | + CAN_DisableInt((CAN_T *)obj->can, (CAN_CON_IE_Msk|CAN_CON_SIE_Msk|CAN_CON_EIE_Msk)); |
| 158 | + |
| 159 | + can_irq_ids[obj->index] = 0; |
| 160 | + |
| 161 | + NVIC_DisableIRQ(CAN0_IRQn); |
| 162 | +} |
| 163 | + |
| 164 | +void can_irq_set(can_t *obj, CanIrqType irq, uint32_t enable) |
| 165 | +{ |
| 166 | + |
| 167 | + CAN_EnterInitMode((CAN_T*)obj->can, ((enable != 0 )? CAN_CON_IE_Msk :0) ); |
| 168 | + |
| 169 | + |
| 170 | + switch (irq) |
| 171 | + { |
| 172 | + case IRQ_ERROR: |
| 173 | + case IRQ_BUS: |
| 174 | + case IRQ_PASSIVE: |
| 175 | + ((CAN_T *)(obj->can))->CON = (((CAN_T *)(obj->can))->CON) |CAN_CON_EIE_Msk; |
| 176 | + ((CAN_T *)(obj->can))->CON = (((CAN_T *)(obj->can))->CON) |CAN_CON_SIE_Msk; |
| 177 | + break; |
| 178 | + |
| 179 | + case IRQ_RX: |
| 180 | + case IRQ_TX: |
| 181 | + case IRQ_OVERRUN: |
| 182 | + case IRQ_WAKEUP: |
| 183 | + ((CAN_T *)(obj->can))->CON = (((CAN_T *)(obj->can))->CON) |CAN_CON_SIE_Msk; |
| 184 | + break; |
| 185 | + |
| 186 | + default: |
| 187 | + break; |
| 188 | + |
| 189 | + } |
| 190 | + |
| 191 | + CAN_LeaveInitMode((CAN_T*)obj->can); |
| 192 | + |
| 193 | + NVIC_SetVector(CAN0_IRQn, (uint32_t)&CAN0_IRQHandler); |
| 194 | + NVIC_EnableIRQ(CAN0_IRQn); |
| 195 | + |
| 196 | +} |
| 197 | + |
| 198 | +int can_write(can_t *obj, CAN_Message msg, int cc) |
| 199 | +{ |
| 200 | + STR_CANMSG_T CMsg; |
| 201 | + |
| 202 | + CMsg.IdType = (uint32_t)msg.format; |
| 203 | + CMsg.FrameType = (uint32_t)!msg.type; |
| 204 | + CMsg.Id = msg.id; |
| 205 | + CMsg.DLC = msg.len; |
| 206 | + memcpy((void *)&CMsg.Data[0],(const void *)&msg.data[0], (unsigned int)8); |
| 207 | + |
| 208 | + return CAN_Transmit((CAN_T *)(obj->can), cc, &CMsg); |
| 209 | +} |
| 210 | + |
| 211 | +int can_read(can_t *obj, CAN_Message *msg, int handle) |
| 212 | +{ |
| 213 | + STR_CANMSG_T CMsg; |
| 214 | + |
| 215 | + if(!CAN_Receive((CAN_T *)(obj->can), handle, &CMsg)) |
| 216 | + return 0; |
| 217 | + |
| 218 | + msg->format = (CANFormat)CMsg.IdType; |
| 219 | + msg->type = (CANType)!CMsg.FrameType; |
| 220 | + msg->id = CMsg.Id; |
| 221 | + msg->len = CMsg.DLC; |
| 222 | + memcpy(&msg->data[0], &CMsg.Data[0], 8); |
| 223 | + |
| 224 | + return 1; |
| 225 | +} |
| 226 | + |
| 227 | +int can_mode(can_t *obj, CanMode mode) |
| 228 | +{ |
| 229 | + int success = 0; |
| 230 | + switch (mode) |
| 231 | + { |
| 232 | + case MODE_RESET: |
| 233 | + CAN_LeaveTestMode((CAN_T*)obj->can); |
| 234 | + success = 1; |
| 235 | + break; |
| 236 | + |
| 237 | + case MODE_NORMAL: |
| 238 | + CAN_EnterTestMode((CAN_T*)(obj->can), CAN_TEST_BASIC_Msk); |
| 239 | + success = 1; |
| 240 | + break; |
| 241 | + |
| 242 | + case MODE_SILENT: |
| 243 | + CAN_EnterTestMode((CAN_T*)(obj->can), CAN_TEST_SILENT_Msk); |
| 244 | + success = 1; |
| 245 | + break; |
| 246 | + |
| 247 | + case MODE_TEST_LOCAL: |
| 248 | + case MODE_TEST_GLOBAL: |
| 249 | + CAN_EnterTestMode((CAN_T*)(obj->can), CAN_TEST_LBACK_Msk); |
| 250 | + success = 1; |
| 251 | + break; |
| 252 | + |
| 253 | + case MODE_TEST_SILENT: |
| 254 | + CAN_EnterTestMode((CAN_T*)(obj->can), CAN_TEST_SILENT_Msk | CAN_TEST_LBACK_Msk); |
| 255 | + success = 1; |
| 256 | + break; |
| 257 | + |
| 258 | + default: |
| 259 | + success = 0; |
| 260 | + break; |
| 261 | + |
| 262 | + } |
| 263 | + |
| 264 | + |
| 265 | + return success; |
| 266 | +} |
| 267 | + |
| 268 | +int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle) |
| 269 | +{ |
| 270 | + return CAN_SetRxMsg((CAN_T *)(obj->can), handle , (uint32_t)format, id); |
| 271 | +} |
| 272 | + |
| 273 | + |
| 274 | +void can_reset(can_t *obj) |
| 275 | +{ |
| 276 | + const struct nu_modinit_s *modinit = get_modinit(obj->can, can_modinit_tab); |
| 277 | + |
| 278 | + MBED_ASSERT(modinit != NULL); |
| 279 | + MBED_ASSERT(modinit->modname == obj->can); |
| 280 | + |
| 281 | + // Reset this module |
| 282 | + SYS_ResetModule(modinit->rsetidx); |
| 283 | + |
| 284 | +} |
| 285 | + |
| 286 | +unsigned char can_rderror(can_t *obj) |
| 287 | +{ |
| 288 | + CAN_T *can = (CAN_T *)(obj->can); |
| 289 | + return ((can->ERR>>8)&0xFF); |
| 290 | +} |
| 291 | + |
| 292 | +unsigned char can_tderror(can_t *obj) |
| 293 | +{ |
| 294 | + CAN_T *can = (CAN_T *)(obj->can); |
| 295 | + return ((can->ERR)&0xFF); |
| 296 | +} |
| 297 | + |
| 298 | +void can_monitor(can_t *obj, int silent) |
| 299 | +{ |
| 300 | + CAN_EnterTestMode((CAN_T *)(obj->can), CAN_TEST_SILENT_Msk); |
| 301 | +} |
| 302 | + |
| 303 | +#endif // DEVICE_CAN |
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