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kgills0xc0170
kgills
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0xc0170
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Fixing the send break for the MAXWSNENV and MAX32600MBED. (#1684)
Our UART doesn't have the ability to send a break, so we make the TX a GPIO and drive it low during the break_set() and then release it back to the UART in the break_clear().
1 parent 0b77111 commit 0b67bf0

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3 files changed

+129
-14
lines changed

3 files changed

+129
-14
lines changed

‎libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/serial_api.c

Lines changed: 61 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,9 @@
3535
#include "mbed_assert.h"
3636
#include "cmsis.h"
3737
#include "serial_api.h"
38+
#include "gpio_api.h"
3839
#include "uart_regs.h"
40+
#include "ioman_regs.h"
3941
#include "PeripheralPins.h"
4042

4143
#define UART_NUM 2
@@ -290,23 +292,76 @@ void serial_clear(serial_t *obj)
290292
obj->uart->ctrl |= (MXC_F_UART_CTRL_TX_FIFO_FLUSH | MXC_F_UART_CTRL_RX_FIFO_FLUSH );
291293
}
292294

293-
294295
//******************************************************************************
295296
void serial_break_set(serial_t *obj)
296297
{
297298
// Make sure that nothing is being sent
298-
while(obj->uart->status & MXC_F_UART_STATUS_RX_BUSY) {}
299+
while (!(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_EMPTY));
300+
while (obj->uart->status & MXC_F_UART_STATUS_TX_BUSY);
301+
302+
// Configure the GPIO to outpu 0
303+
gpio_t tx_gpio;
304+
switch (((UARTName)(obj->uart))) {
305+
case UART_0:
306+
gpio_init_out(&tx_gpio, UART0_TX);
307+
break;
308+
case UART_1:
309+
gpio_init_out(&tx_gpio, UART1_TX);
310+
break;
311+
default:
312+
gpio_init_out(&tx_gpio, (PinName)NC);
313+
break;
314+
}
315+
316+
gpio_write(&tx_gpio, 0);
299317

300-
// Disable the clock to pause any transmission
301-
obj->uart->ctrl &= ~MXC_F_UART_CTRL_BAUD_CLK_EN ;
318+
// GPIO is setup now, but we need to maps gpio to the pin
319+
switch (((UARTName)(obj->uart))) {
320+
case UART_0:
321+
MXC_IOMAN->uart0_req &= ~MXC_F_IOMAN_UART_CORE_IO;
322+
MBED_ASSERT((MXC_IOMAN->uart0_ack & (MXC_F_IOMAN_UART_CORE_IO | MXC_F_IOMAN_UART_CORE_IO)) == 0);
323+
break;
324+
case UART_1:
325+
MXC_IOMAN->uart1_req &= ~MXC_F_IOMAN_UART_CORE_IO;
326+
MBED_ASSERT((MXC_IOMAN->uart1_ack & (MXC_F_IOMAN_UART_CORE_IO | MXC_F_IOMAN_UART_CORE_IO)) == 0);
327+
break;
328+
default:
329+
break;
330+
}
302331
}
303332

304333
//******************************************************************************
305334
void serial_break_clear(serial_t *obj)
306335
{
307-
obj->uart->ctrl |= MXC_F_UART_CTRL_BAUD_CLK_EN;
308-
}
336+
// Configure the GPIO to output 1
337+
gpio_t tx_gpio;
338+
switch (((UARTName)(obj->uart))) {
339+
case UART_0:
340+
gpio_init_out(&tx_gpio, UART0_TX);
341+
break;
342+
case UART_1:
343+
gpio_init_out(&tx_gpio, UART1_TX);
344+
break;
345+
default:
346+
gpio_init_out(&tx_gpio, (PinName)NC);
347+
break;
348+
}
349+
350+
gpio_write(&tx_gpio, 1);
309351

352+
// Renable UART
353+
switch (((UARTName)(obj->uart))) {
354+
case UART_0:
355+
serial_pinout_tx(UART0_TX);
356+
break;
357+
case UART_1:
358+
serial_pinout_tx(UART1_TX);
359+
break;
360+
default:
361+
serial_pinout_tx((PinName)NC);
362+
break;
363+
}
364+
}
310365

311366
//******************************************************************************
312367
void serial_pinout_tx(PinName tx)

‎libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/TARGET_MAXWSNENV/PinNames.h

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -130,11 +130,16 @@ typedef enum {
130130
SW1 = P1_5,
131131

132132
// UART Pins
133-
USBTX = P1_3,
134-
USBRX = P1_2,
133+
UART0_RX = P1_0,
134+
UART0_TX = P1_1,
135+
UART1_RX = P1_2,
136+
UART1_TX = P1_3,
137+
USBTX = UART1_TX,
138+
USBRX = UART1_RX,
135139
STDIO_UART_TX = USBTX,
136140
STDIO_UART_RX = USBRX,
137141

142+
// I2C Pins
138143
I2C_SCL = P0_5,
139144
I2C_SDA = P0_4,
140145

‎libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/serial_api.c

Lines changed: 61 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,9 @@
3535
#include "mbed_assert.h"
3636
#include "cmsis.h"
3737
#include "serial_api.h"
38+
#include "gpio_api.h"
3839
#include "uart_regs.h"
40+
#include "ioman_regs.h"
3941
#include "PeripheralPins.h"
4042

4143
#define UART_NUM 2
@@ -290,23 +292,76 @@ void serial_clear(serial_t *obj)
290292
obj->uart->ctrl |= (MXC_F_UART_CTRL_TX_FIFO_FLUSH | MXC_F_UART_CTRL_RX_FIFO_FLUSH );
291293
}
292294

293-
294295
//******************************************************************************
295296
void serial_break_set(serial_t *obj)
296297
{
297298
// Make sure that nothing is being sent
298-
while(obj->uart->status & MXC_F_UART_STATUS_RX_BUSY) {}
299+
while (!(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_EMPTY));
300+
while (obj->uart->status & MXC_F_UART_STATUS_TX_BUSY);
301+
302+
// Configure the GPIO to outpu 0
303+
gpio_t tx_gpio;
304+
switch (((UARTName)(obj->uart))) {
305+
case UART_0:
306+
gpio_init_out(&tx_gpio, UART0_TX);
307+
break;
308+
case UART_1:
309+
gpio_init_out(&tx_gpio, UART1_TX);
310+
break;
311+
default:
312+
gpio_init_out(&tx_gpio, (PinName)NC);
313+
break;
314+
}
315+
316+
gpio_write(&tx_gpio, 0);
299317

300-
// Disable the clock to pause any transmission
301-
obj->uart->ctrl &= ~MXC_F_UART_CTRL_BAUD_CLK_EN ;
318+
// GPIO is setup now, but we need to maps gpio to the pin
319+
switch (((UARTName)(obj->uart))) {
320+
case UART_0:
321+
MXC_IOMAN->uart0_req &= ~MXC_F_IOMAN_UART_CORE_IO;
322+
MBED_ASSERT((MXC_IOMAN->uart0_ack & (MXC_F_IOMAN_UART_CORE_IO | MXC_F_IOMAN_UART_CORE_IO)) == 0);
323+
break;
324+
case UART_1:
325+
MXC_IOMAN->uart1_req &= ~MXC_F_IOMAN_UART_CORE_IO;
326+
MBED_ASSERT((MXC_IOMAN->uart1_ack & (MXC_F_IOMAN_UART_CORE_IO | MXC_F_IOMAN_UART_CORE_IO)) == 0);
327+
break;
328+
default:
329+
break;
330+
}
302331
}
303332

304333
//******************************************************************************
305334
void serial_break_clear(serial_t *obj)
306335
{
307-
obj->uart->ctrl |= MXC_F_UART_CTRL_BAUD_CLK_EN;
308-
}
336+
// Configure the GPIO to output 1
337+
gpio_t tx_gpio;
338+
switch (((UARTName)(obj->uart))) {
339+
case UART_0:
340+
gpio_init_out(&tx_gpio, UART0_TX);
341+
break;
342+
case UART_1:
343+
gpio_init_out(&tx_gpio, UART1_TX);
344+
break;
345+
default:
346+
gpio_init_out(&tx_gpio, (PinName)NC);
347+
break;
348+
}
349+
350+
gpio_write(&tx_gpio, 1);
309351

352+
// Renable UART
353+
switch (((UARTName)(obj->uart))) {
354+
case UART_0:
355+
serial_pinout_tx(UART0_TX);
356+
break;
357+
case UART_1:
358+
serial_pinout_tx(UART1_TX);
359+
break;
360+
default:
361+
serial_pinout_tx((PinName)NC);
362+
break;
363+
}
364+
}
310365

311366
//******************************************************************************
312367
void serial_pinout_tx(PinName tx)

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