Skip to content

Commit 0bf364e

Browse files
committed
STM32 LOW_POWER_TIMER update : rtc_api.c
Add RSF synchro during init Set a better WakeUp clock for long wake up period in order to stay in sleep mode Use rtc_isenabled function before init as rtc_init is called at each set_time call
1 parent b65e861 commit 0bf364e

File tree

2 files changed

+68
-48
lines changed

2 files changed

+68
-48
lines changed

targets/TARGET_STM/rtc_api.c

Lines changed: 61 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* mbed Microcontroller Library
22
*******************************************************************************
3-
* Copyright (c) 2016, STMicroelectronics
3+
* Copyright (c) 2017, STMicroelectronics
44
* All rights reserved.
55
*
66
* Redistribution and use in source and binary forms, with or without
@@ -27,29 +27,23 @@
2727
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2828
*******************************************************************************
2929
*/
30+
3031
#if DEVICE_RTC
3132

32-
#include "rtc_api.h"
3333
#include "rtc_api_hal.h"
3434
#include "mbed_error.h"
3535
#include "mbed_mktime.h"
3636

3737
static RTC_HandleTypeDef RtcHandle;
3838

39-
#if RTC_LSI
40-
#define RTC_CLOCK LSI_VALUE
41-
#else
42-
#define RTC_CLOCK LSE_VALUE
43-
#endif
44-
4539
#if DEVICE_LOWPOWERTIMER
4640
#define RTC_ASYNCH_PREDIV ((RTC_CLOCK - 1) / 0x8000)
47-
#define RTC_SYNCH_PREDIV (RTC_CLOCK / (RTC_ASYNCH_PREDIV + 1) - 1)
4841
#else
4942
#define RTC_ASYNCH_PREDIV (0x007F)
50-
#define RTC_SYNCH_PREDIV (RTC_CLOCK / (RTC_ASYNCH_PREDIV + 1) - 1)
5143
#endif
5244

45+
#define RTC_SYNCH_PREDIV (RTC_CLOCK / (RTC_ASYNCH_PREDIV + 1) - 1)
46+
5347
#if DEVICE_LOWPOWERTIMER
5448
static void (*irq_handler)(void);
5549
static void RTC_IRQHandler(void);
@@ -63,28 +57,29 @@ void rtc_init(void)
6357
// Enable access to Backup domain
6458
HAL_PWR_EnableBkUpAccess();
6559

66-
RtcHandle.Instance = RTC;
67-
RtcHandle.State = HAL_RTC_STATE_RESET;
68-
69-
#if !RTC_LSI
60+
#if !RTC_LSI /* => LSE */
7061
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
7162
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
7263
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
7364
RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
7465

75-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
76-
__HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSE);
77-
__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
78-
} else {
66+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
7967
error("Cannot initialize RTC with LSE\n");
8068
}
8169

70+
__HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSE);
71+
__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
72+
8273
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
8374
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
8475
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
8576
error("PeriphClkInitStruct RTC failed with LSE\n");
8677
}
87-
#else /* !RTC_LSI */
78+
79+
if (rtc_isenabled()) return;
80+
#else /* => RTC_LSI */
81+
if (rtc_isenabled()) return;
82+
8883
__HAL_RCC_PWR_CLK_ENABLE();
8984

9085
// Reset Backup domain
@@ -113,6 +108,9 @@ void rtc_init(void)
113108
// Enable RTC
114109
__HAL_RCC_RTC_ENABLE();
115110

111+
RtcHandle.Instance = RTC;
112+
RtcHandle.State = HAL_RTC_STATE_RESET;
113+
116114
#if TARGET_STM32F1
117115
RtcHandle.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
118116
#else /* TARGET_STM32F1 */
@@ -125,24 +123,14 @@ void rtc_init(void)
125123
#endif /* TARGET_STM32F1 */
126124

127125
if (HAL_RTC_Init(&RtcHandle) != HAL_OK) {
128-
error("RTC error: RTC initialization failed.");
126+
error("RTC initialization failed");
129127
}
130128

131-
#if DEVICE_LOWPOWERTIMER
129+
rtc_synchronize(); // Wait for RSF
132130

133-
#if !RTC_LSI
134-
if (!rtc_isenabled())
135-
#endif /* !RTC_LSI */
136-
{
131+
if (!rtc_isenabled()) {
137132
rtc_write(0);
138133
}
139-
140-
NVIC_ClearPendingIRQ(RTC_WKUP_IRQn);
141-
NVIC_DisableIRQ(RTC_WKUP_IRQn);
142-
NVIC_SetVector(RTC_WKUP_IRQn, (uint32_t)RTC_IRQHandler);
143-
NVIC_EnableIRQ(RTC_WKUP_IRQn);
144-
145-
#endif /* DEVICE_LOWPOWERTIMER */
146134
}
147135

148136
void rtc_free(void)
@@ -279,8 +267,12 @@ void rtc_write(time_t t)
279267
#endif /* TARGET_STM32F1 */
280268

281269
// Change the RTC current date/time
282-
HAL_RTC_SetDate(&RtcHandle, &dateStruct, RTC_FORMAT_BIN);
283-
HAL_RTC_SetTime(&RtcHandle, &timeStruct, RTC_FORMAT_BIN);
270+
if (HAL_RTC_SetDate(&RtcHandle, &dateStruct, RTC_FORMAT_BIN) != HAL_OK) {
271+
printf("HAL_RTC_SetDate error\n");
272+
}
273+
if (HAL_RTC_SetTime(&RtcHandle, &timeStruct, RTC_FORMAT_BIN) != HAL_OK) {
274+
printf("HAL_RTC_SetTime error\n");
275+
}
284276
}
285277

286278
int rtc_isenabled(void)
@@ -292,6 +284,13 @@ int rtc_isenabled(void)
292284
#endif /* TARGET_STM32F1 */
293285
}
294286

287+
void rtc_synchronize(void)
288+
{
289+
if (HAL_RTC_WaitForSynchro(&RtcHandle) != HAL_OK) {
290+
error("rtc_synchronize error\n");
291+
}
292+
}
293+
295294
#if DEVICE_LOWPOWERTIMER
296295

297296
static void RTC_IRQHandler(void)
@@ -304,23 +303,42 @@ static void RTC_IRQHandler(void)
304303
}
305304
}
306305

307-
void rtc_set_irq_handler(uint32_t handler)
308-
{
309-
irq_handler = (void (*)(void))handler;
310-
}
311-
312306
uint32_t rtc_read_subseconds(void)
313307
{
314308
return 1000000.f * ((double)(RTC_SYNCH_PREDIV - RTC->SSR) / (RTC_SYNCH_PREDIV + 1));
315309
}
316310

317311
void rtc_set_wake_up_timer(uint32_t delta)
318312
{
319-
uint32_t wake_up_counter = delta / (2000000 / RTC_CLOCK);
313+
/* Ex for Wakeup period resolution with RTCCLK=32768 Hz :
314+
* RTCCLK_DIV2: ~122us < wakeup period < ~4s
315+
* RTCCLK_DIV4: ~244us < wakeup period < ~8s
316+
* RTCCLK_DIV8: ~488us < wakeup period < ~16s
317+
* RTCCLK_DIV16: ~976us < wakeup period < ~32s
318+
* CK_SPRE_16BITS: 1s < wakeup period < (0xFFFF+ 1) x 1 s = 65536 s (18 hours)
319+
* CK_SPRE_17BITS: 18h+1s < wakeup period < (0x1FFFF+ 1) x 1 s = 131072 s (36 hours)
320+
*/
321+
uint32_t WakeUpClock[6] = {RTC_WAKEUPCLOCK_RTCCLK_DIV2, RTC_WAKEUPCLOCK_RTCCLK_DIV4, RTC_WAKEUPCLOCK_RTCCLK_DIV8, RTC_WAKEUPCLOCK_RTCCLK_DIV16, RTC_WAKEUPCLOCK_CK_SPRE_16BITS, RTC_WAKEUPCLOCK_CK_SPRE_17BITS};
322+
uint8_t ClockDiv[4] = {2, 4, 8, 16};
323+
uint32_t WakeUpCounter;
324+
uint8_t DivIndex = 0;
325+
326+
do {
327+
WakeUpCounter = delta / (ClockDiv[DivIndex] * 1000000 / RTC_CLOCK);
328+
DivIndex++;
329+
} while ( (WakeUpCounter > 0xFFFF) && (DivIndex < 4) );
330+
331+
if (WakeUpCounter > 0xFFFF) {
332+
WakeUpCounter = delta / 1000000;
333+
DivIndex++;
334+
}
320335

321-
if (HAL_RTCEx_SetWakeUpTimer_IT(&RtcHandle, wake_up_counter,
322-
RTC_WAKEUPCLOCK_RTCCLK_DIV2) != HAL_OK) {
323-
error("Set wake up timer failed\n");
336+
irq_handler = (void (*)(void))lp_ticker_irq_handler;
337+
NVIC_SetVector(RTC_WKUP_IRQn, (uint32_t)RTC_IRQHandler);
338+
NVIC_EnableIRQ(RTC_WKUP_IRQn);
339+
340+
if (HAL_RTCEx_SetWakeUpTimer_IT(&RtcHandle, 0xFFFF & WakeUpCounter, WakeUpClock[DivIndex-1]) != HAL_OK) {
341+
error("rtc_set_wake_up_timer init error (%d)\n", DivIndex);
324342
}
325343
}
326344

@@ -329,10 +347,6 @@ void rtc_deactivate_wake_up_timer(void)
329347
HAL_RTCEx_DeactivateWakeUpTimer(&RtcHandle);
330348
}
331349

332-
void rtc_synchronize(void)
333-
{
334-
HAL_RTC_WaitForSynchro(&RtcHandle);
335-
}
336350
#endif /* DEVICE_LOWPOWERTIMER */
337351

338352
#endif /* DEVICE_RTC */

targets/TARGET_STM/rtc_api_hal.h

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* mbed Microcontroller Library
22
*******************************************************************************
3-
* Copyright (c) 2016, STMicroelectronics
3+
* Copyright (c) 2017, STMicroelectronics
44
* All rights reserved.
55
*
66
* Redistribution and use in source and binary forms, with or without
@@ -40,6 +40,12 @@
4040
extern "C" {
4141
#endif
4242

43+
#if RTC_LSI
44+
#define RTC_CLOCK LSI_VALUE
45+
#else
46+
#define RTC_CLOCK LSE_VALUE
47+
#endif
48+
4349
/** Read the subsecond register.
4450
*
4551
* @return The remaining time as microseconds (0-999999)

0 commit comments

Comments
 (0)