STM32L4 QSPI: correct register address

jeromecoutant · Cruz Monrreal II · commit 0c4d7d4dd66d · 2018-12-27T22:26:01.000-06:00
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PeripheralNames.h
@@ -84,7 +84,7 @@ typedef enum {
 } CANName;
 
 typedef enum {
-    QSPI_1 = (int)QSPI_BASE
+    QSPI_1 = (int)QSPI_R_BASE
 } QSPIName;
 
 #ifdef __cplusplus
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PeripheralNames.h
@@ -84,7 +84,7 @@ typedef enum {
 } CANName;
 
 typedef enum {
-    QSPI_1 = (int)QSPI_BASE
+    QSPI_1 = (int)QSPI_R_BASE
 } QSPIName;
 
 #ifdef __cplusplus
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PeripheralNames.h
@@ -86,7 +86,7 @@ typedef enum {
 } CANName;
 
 typedef enum {
-    QSPI_1 = (int)QSPI_BASE
+    QSPI_1 = (int)QSPI_R_BASE
 } QSPIName;
 
 #ifdef __cplusplus
