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Analog API - pins, analog pins (arduino) correction, irq
 - ADC - pins, mux - analog pins - Ax - irq - port A - E
1 parent 3dc97b2 commit 0e99a7c

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4 files changed

+48
-55
lines changed

4 files changed

+48
-55
lines changed

‎libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/PeripheralNames.h

Lines changed: 1 addition & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,6 @@ typedef enum {
3333

3434
typedef enum {
3535
I2C_0 = (int)I2C0_BASE,
36-
//I2C_1 = (int)I2C1_BASE,
3736
} I2CName;
3837

3938
#define TPM_SHIFT 8
@@ -52,24 +51,17 @@ typedef enum {
5251
PWM_10 = (2 << TPM_SHIFT) | (1) // TPM2 CH1
5352
} PWMName;
5453

55-
#define CHANNELS_A_SHIFT 5
5654
typedef enum {
57-
ADC0_SE0 = 0,
58-
ADC0_SE3 = 3,
59-
ADC0_SE4a = (1 << CHANNELS_A_SHIFT) | (4),
6055
ADC0_SE4b = 4,
6156
ADC0_SE5b = 5,
6257
ADC0_SE6b = 6,
63-
ADC0_SE7a = (1 << CHANNELS_A_SHIFT) | (7),
6458
ADC0_SE7b = 7,
6559
ADC0_SE8 = 8,
6660
ADC0_SE9 = 9,
67-
ADC0_SE11 = 11,
6861
ADC0_SE12 = 12,
6962
ADC0_SE13 = 13,
7063
ADC0_SE14 = 14,
71-
ADC0_SE15 = 15,
72-
ADC0_SE23 = 23
64+
ADC0_SE15 = 15
7365
} ADCName;
7466

7567
typedef enum {
@@ -79,7 +71,6 @@ typedef enum {
7971

8072
typedef enum {
8173
SPI_0 = (int)SPI0_BASE,
82-
//SPI_1 = (int)SPI1_BASE,
8374
} SPIName;
8475

8576
#ifdef __cplusplus

‎libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/PinNames.h

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -224,12 +224,12 @@ typedef enum {
224224
D14 = PTB3,
225225
D15 = PTB2,
226226

227-
A0 = PTB0,
228-
A1 = PTB1,
229-
A2 = PTD5,
230-
A3 = PTD6,
231-
A4 = PTC1,
232-
A5 = PTC0,
227+
A0 = PTC0,
228+
A1 = PTC1,
229+
A2 = PTD6,
230+
A3 = PTD5,
231+
A4 = PTB1,
232+
A5 = PTB0,
233233

234234
// Not connected
235235
NC = (int)0xFFFFFFFF

‎libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/analogin_api.c

Lines changed: 14 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -20,23 +20,17 @@
2020
#include "error.h"
2121

2222
static const PinMap PinMap_ADC[] = {
23-
{PTE20, ADC0_SE0, 0},
24-
{PTE22, ADC0_SE3, 0},
25-
{PTE21, ADC0_SE4a, 0},
26-
{PTE29, ADC0_SE4b, 0},
27-
{PTE30, ADC0_SE23, 0},
28-
{PTE23, ADC0_SE7a, 0},
29-
{PTB0, ADC0_SE8, 0},
30-
{PTB1, ADC0_SE9, 0},
31-
{PTB2, ADC0_SE12, 0},
32-
{PTB3, ADC0_SE13, 0},
33-
{PTC0, ADC0_SE14, 0},
34-
{PTC1, ADC0_SE15, 0},
35-
{PTC2, ADC0_SE11, 0},
36-
{PTD1, ADC0_SE5b, 0},
37-
{PTD5, ADC0_SE6b, 0},
38-
{PTD6, ADC0_SE7b, 0},
39-
{NC, NC, 0}
23+
{PTC2, ADC0_SE4b, 0},
24+
{PTD1, ADC0_SE5b, 0},
25+
{PTD5, ADC0_SE6b, 0},
26+
{PTD6, ADC0_SE7b, 0},
27+
{PTB0, ADC0_SE8, 0},
28+
{PTB1, ADC0_SE9, 0},
29+
{PTB2, ADC0_SE12, 0},
30+
{PTB3, ADC0_SE13, 0},
31+
{PTC0, ADC0_SE14, 0},
32+
{PTC1, ADC0_SE15, 0},
33+
{NC, NC, 0}
4034
};
4135

4236
void analogin_init(analogin_t *obj, PinName pin) {
@@ -50,20 +44,15 @@ void analogin_init(analogin_t *obj, PinName pin) {
5044
uint32_t port = (uint32_t)pin >> PORT_SHIFT;
5145
SIM->SCGC5 |= 1 << (SIM_SCGC5_PORTA_SHIFT + port);
5246

53-
uint32_t cfg2_muxsel = ADC_CFG2_MUXSEL_MASK;
54-
if (obj->adc & (1 << CHANNELS_A_SHIFT)) {
55-
cfg2_muxsel = 0;
56-
}
57-
58-
ADC0->SC1[1] = ADC_SC1_ADCH(obj->adc & ~(1 << CHANNELS_A_SHIFT));
47+
ADC0->SC1[1] = ADC_SC1_ADCH(obj->adc);
5948

6049
ADC0->CFG1 = ADC_CFG1_ADLPC_MASK // Low-Power Configuration
6150
| ADC_CFG1_ADIV(3) // Clock Divide Select: (Input Clock)/8
6251
| ADC_CFG1_ADLSMP_MASK // Long Sample Time
6352
| ADC_CFG1_MODE(3) // (16)bits Resolution
6453
| ADC_CFG1_ADICLK(1); // Input Clock: (Bus Clock)/2
6554

66-
ADC0->CFG2 = cfg2_muxsel // ADxxb or ADxxa channels
55+
ADC0->CFG2 = ADC_CFG2_MUXSEL_MASK // ADxxb or ADxxa channels
6756
| ADC_CFG2_ADACKEN_MASK // Asynchronous Clock Output Enable
6857
| ADC_CFG2_ADHSC_MASK // High-Speed Configuration
6958
| ADC_CFG2_ADLSTS(0); // Long Sample Time Select
@@ -78,7 +67,7 @@ void analogin_init(analogin_t *obj, PinName pin) {
7867

7968
uint16_t analogin_read_u16(analogin_t *obj) {
8069
// start conversion
81-
ADC0->SC1[0] = ADC_SC1_ADCH(obj->adc & ~(1 << CHANNELS_A_SHIFT));
70+
ADC0->SC1[0] = ADC_SC1_ADCH(obj->adc);
8271

8372
// Wait Conversion Complete
8473
while ((ADC0->SC1[0] & ADC_SC1_COCO_MASK) != ADC_SC1_COCO_MASK);

‎libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/gpio_irq_api.c

Lines changed: 27 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@
1919
#include "gpio_irq_api.h"
2020
#include "error.h"
2121

22-
#define CHANNEL_NUM 64
22+
#define CHANNEL_NUM 160
2323

2424
static uint32_t channel_ids[CHANNEL_NUM] = {0};
2525
static gpio_irq_handler irq_handler;
@@ -39,8 +39,9 @@ static void handle_interrupt_in(PORT_Type *port, int ch_base) {
3939
uint32_t id = channel_ids[ch_base + i];
4040
if (id == 0) continue;
4141

42-
GPIO_Type *gpio;
42+
GPIO_Type *gpio = PTA;
4343
gpio_irq_event event = IRQ_NONE;
44+
uint32_t port_num = (port - PORTA) >> 12;
4445
switch (port->PCR[i] & PORT_PCR_IRQC_MASK) {
4546
case IRQ_RAISING_EDGE:
4647
event = IRQ_RISE;
@@ -51,7 +52,8 @@ static void handle_interrupt_in(PORT_Type *port, int ch_base) {
5152
break;
5253

5354
case IRQ_EITHER_EDGE:
54-
gpio = (port == PORTA) ? (PTA) : (PTD);
55+
gpio += (port_num * 0x40);
56+
//gpio = (port == PORTA) ? (PTA) : (PTD);
5557
event = (gpio->PDIR & pmask) ? (IRQ_RISE) : (IRQ_FALL);
5658
break;
5759
}
@@ -63,7 +65,10 @@ static void handle_interrupt_in(PORT_Type *port, int ch_base) {
6365
}
6466

6567
void gpio_irqA(void) {handle_interrupt_in(PORTA, 0);}
66-
void gpio_irqD(void) {handle_interrupt_in(PORTD, 32);}
68+
void gpio_irqB(void) {handle_interrupt_in(PORTB, 32);}
69+
void gpio_irqC(void) {handle_interrupt_in(PORTC, 64);}
70+
void gpio_irqD(void) {handle_interrupt_in(PORTD, 96);}
71+
void gpio_irqE(void) {handle_interrupt_in(PORTE, 128);}
6772

6873
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
6974
if (pin == NC) return -1;
@@ -76,17 +81,25 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
7681
uint32_t ch_base, vector;
7782
IRQn_Type irq_n;
7883
switch (obj->port) {
79-
case PortA:
80-
ch_base = 0; irq_n = PORTA_IRQn; vector = (uint32_t)gpio_irqA;
81-
break;
82-
83-
case PortD:
84-
ch_base = 32; irq_n = PORTD_IRQn; vector = (uint32_t)gpio_irqD;
85-
break;
84+
case PortA:
85+
ch_base = 0; irq_n = PORTA_IRQn; vector = (uint32_t)gpio_irqA;
86+
break;
87+
case PortB:
88+
ch_base = 0; irq_n = PORTB_IRQn; vector = (uint32_t)gpio_irqB;
89+
break;
90+
case PortC:
91+
ch_base = 0; irq_n = PORTC_IRQn; vector = (uint32_t)gpio_irqC;
92+
break;
93+
case PortD:
94+
ch_base = 32; irq_n = PORTD_IRQn; vector = (uint32_t)gpio_irqD;
95+
break;
96+
case PortE:
97+
ch_base = 0; irq_n = PORTE_IRQn; vector = (uint32_t)gpio_irqE;
98+
break;
8699

87-
default:
88-
error("gpio_irq only supported on port A and D\n");
89-
break;
100+
default:
101+
error("gpio_irq only supported on port A and D\n");
102+
break;
90103
}
91104
NVIC_SetVector(irq_n, vector);
92105
NVIC_EnableIRQ(irq_n);

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