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harrisonmutai-armharrisonmutai-arm
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Add bare metal support to ARM_MPS2_Target family of targets
1 parent 2660621 commit 0f23373

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7 files changed

+220
-77
lines changed

7 files changed

+220
-77
lines changed

‎targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct

Lines changed: 41 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,22 @@
3434
; *** Scatter-Loading Description File ***
3535
; *************************************************************
3636

37+
#if !defined(MBED_APP_START)
38+
#define MBED_APP_START 0x00000000
39+
#endif
40+
41+
#if !defined(MBED_APP_SIZE)
42+
#define MBED_APP_SIZE 0x00400000
43+
#endif
44+
45+
#if !defined(MBED_RAM_START)
46+
#define MBED_RAM_START 0x20000000
47+
#endif
48+
49+
#if !defined(MBED_RAM_SIZE)
50+
#define MBED_RAM_SIZE 0x400000
51+
#endif
52+
3753
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
3854
# if defined(MBED_BOOT_STACK_SIZE)
3955
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
@@ -42,19 +58,29 @@
4258
# endif
4359
#endif
4460

45-
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
46-
47-
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
48-
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
49-
*.o (RESET, +First)
50-
*(InRoot$$Sections)
51-
*(+RO)
52-
}
53-
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
54-
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
55-
*(+RW +ZI)
56-
}
57-
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
58-
}
59-
}
61+
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
62+
#define VECTOR_SIZE 0x100
63+
64+
#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE + VECTOR_SIZE)
65+
66+
#define MBED_RAM1_START (MBED_RAM_START + VECTOR_SIZE)
67+
#define MBED_RAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE)
68+
69+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
70+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
71+
*.o (RESET, +First)
72+
*(InRoot$$Sections)
73+
*(+RO)
74+
}
6075

76+
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
77+
RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data
78+
*(+RW +ZI)
79+
}
80+
81+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)) { ; Heap region growing up
82+
}
83+
84+
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down
85+
}
86+
}

‎targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct

Lines changed: 41 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,22 @@
3434
; *** Scatter-Loading Description File ***
3535
; *************************************************************
3636

37+
#if !defined(MBED_APP_START)
38+
#define MBED_APP_START 0x00000000
39+
#endif
40+
41+
#if !defined(MBED_APP_SIZE)
42+
#define MBED_APP_SIZE 0x00400000
43+
#endif
44+
45+
#if !defined(MBED_RAM_START)
46+
#define MBED_RAM_START 0x20000000
47+
#endif
48+
49+
#if !defined(MBED_RAM_SIZE)
50+
#define MBED_RAM_SIZE 0x400000
51+
#endif
52+
3753
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
3854
# if defined(MBED_BOOT_STACK_SIZE)
3955
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
@@ -42,19 +58,29 @@
4258
# endif
4359
#endif
4460

45-
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
46-
47-
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
48-
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
49-
*.o (RESET, +First)
50-
*(InRoot$$Sections)
51-
*(+RO)
52-
}
53-
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
54-
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
55-
*(+RW +ZI)
56-
}
57-
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
58-
}
59-
}
61+
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
62+
#define VECTOR_SIZE 0x100
63+
64+
#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE + VECTOR_SIZE)
65+
66+
#define MBED_RAM1_START (MBED_RAM_START + VECTOR_SIZE)
67+
#define MBED_RAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE)
68+
69+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
70+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
71+
*.o (RESET, +First)
72+
*(InRoot$$Sections)
73+
*(+RO)
74+
}
6075

76+
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
77+
RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data
78+
*(+RW +ZI)
79+
}
80+
81+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)) { ; Heap region growing up
82+
}
83+
84+
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down
85+
}
86+
}

‎targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct

Lines changed: 42 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,23 @@
3434
; *** Scatter-Loading Description File ***
3535
; *************************************************************
3636

37+
38+
#if !defined(MBED_APP_START)
39+
#define MBED_APP_START 0x00000000
40+
#endif
41+
42+
#if !defined(MBED_APP_SIZE)
43+
#define MBED_APP_SIZE 0x00400000
44+
#endif
45+
46+
#if !defined(MBED_RAM_START)
47+
#define MBED_RAM_START 0x20000000
48+
#endif
49+
50+
#if !defined(MBED_RAM_SIZE)
51+
#define MBED_RAM_SIZE 0x400000
52+
#endif
53+
3754
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
3855
# if defined(MBED_BOOT_STACK_SIZE)
3956
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
@@ -42,19 +59,29 @@
4259
# endif
4360
#endif
4461

45-
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
46-
47-
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
48-
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
49-
*.o (RESET, +First)
50-
*(InRoot$$Sections)
51-
*(+RO)
52-
}
53-
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
54-
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
55-
*(+RW +ZI)
56-
}
57-
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
58-
}
59-
}
62+
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
63+
#define VECTOR_SIZE 0x100
64+
65+
#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE + VECTOR_SIZE)
66+
67+
#define MBED_RAM1_START (MBED_RAM_START + VECTOR_SIZE)
68+
#define MBED_RAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE)
6069

70+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
71+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
72+
*.o (RESET, +First)
73+
*(InRoot$$Sections)
74+
*(+RO)
75+
}
76+
77+
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
78+
RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data
79+
*(+RW +ZI)
80+
}
81+
82+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)) { ; Heap region growing up
83+
}
84+
85+
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down
86+
}
87+
}

‎targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct

Lines changed: 41 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,22 @@
3535
; *** Scatter-Loading Description File ***
3636
; *************************************************************
3737

38+
#if !defined(MBED_APP_START)
39+
#define MBED_APP_START 0x00000000
40+
#endif
41+
42+
#if !defined(MBED_APP_SIZE)
43+
#define MBED_APP_SIZE 0x00400000
44+
#endif
45+
46+
#if !defined(MBED_RAM_START)
47+
#define MBED_RAM_START 0x20000000
48+
#endif
49+
50+
#if !defined(MBED_RAM_SIZE)
51+
#define MBED_RAM_SIZE 0x400000
52+
#endif
53+
3854
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
3955
# if defined(MBED_BOOT_STACK_SIZE)
4056
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
@@ -43,19 +59,29 @@
4359
# endif
4460
#endif
4561

46-
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
47-
48-
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
49-
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
50-
*.o (RESET, +First)
51-
*(InRoot$$Sections)
52-
*(+RO)
53-
}
54-
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
55-
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
56-
*(+RW +ZI)
57-
}
58-
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
59-
}
60-
}
62+
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
63+
#define VECTOR_SIZE 0x100
64+
65+
#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE + VECTOR_SIZE)
66+
67+
#define MBED_RAM1_START (MBED_RAM_START + VECTOR_SIZE)
68+
#define MBED_RAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE)
69+
70+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
71+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
72+
*.o (RESET, +First)
73+
*(InRoot$$Sections)
74+
*(+RO)
75+
}
6176

77+
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
78+
RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data
79+
*(+RW +ZI)
80+
}
81+
82+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)) { ; Heap region growing up
83+
}
84+
85+
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down
86+
}
87+
}

‎targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/CMakeLists.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ target_include_directories(mbed-arm-mps2-m7
1010

1111
if(${MBED_TOOLCHAIN} STREQUAL "ARM")
1212
set(LINKER_FILE device/TOOLCHAIN_ARM_STD/MPS2.sct)
13-
set(STARTUP_FILE device/TOOLCHAIN_ARM_STD/startup_MPS2.S)
13+
set(STARTUP_FILE device/TOOLCHAIN_ARM_STD/startup_CMSDK_CM7.S)
1414
elseif(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
1515
set(LINKER_FILE device/TOOLCHAIN_GCC_ARM/MPS2.ld)
1616
set(STARTUP_FILE device/TOOLCHAIN_GCC_ARM/startup_MPS2.S)

‎targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct

Lines changed: 42 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,23 @@
3535
; *** Scatter-Loading Description File ***
3636
; *************************************************************
3737

38+
39+
#if !defined(MBED_APP_START)
40+
#define MBED_APP_START 0x00000000
41+
#endif
42+
43+
#if !defined(MBED_APP_SIZE)
44+
#define MBED_APP_SIZE 0x00400000
45+
#endif
46+
47+
#if !defined(MBED_RAM_START)
48+
#define MBED_RAM_START 0x20000000
49+
#endif
50+
51+
#if !defined(MBED_RAM_SIZE)
52+
#define MBED_RAM_SIZE 0x400000
53+
#endif
54+
3855
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
3956
# if defined(MBED_BOOT_STACK_SIZE)
4057
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
@@ -43,19 +60,29 @@
4360
# endif
4461
#endif
4562

46-
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
47-
48-
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
49-
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
50-
*.o (RESET, +First)
51-
*(InRoot$$Sections)
52-
*(+RO)
53-
}
54-
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
55-
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
56-
*(+RW +ZI)
57-
}
58-
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
59-
}
60-
}
63+
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
64+
#define VECTOR_SIZE 0x100
65+
66+
#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE + VECTOR_SIZE)
67+
68+
#define MBED_RAM1_START (MBED_RAM_START + VECTOR_SIZE)
69+
#define MBED_RAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE)
6170

71+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
72+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
73+
*.o (RESET, +First)
74+
*(InRoot$$Sections)
75+
*(+RO)
76+
}
77+
78+
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
79+
RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data
80+
*(+RW +ZI)
81+
}
82+
83+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)) { ; Heap region growing up
84+
}
85+
86+
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down
87+
}
88+
}

‎targets/targets.json

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4403,7 +4403,18 @@
44034403
"SPI",
44044404
"SPISLAVE",
44054405
"TSC"
4406-
]
4406+
],
4407+
"supported_application_profiles" : ["full", "bare-metal"],
4408+
"supported_c_libs": {
4409+
"arm": [
4410+
"std",
4411+
"small"
4412+
],
4413+
"gcc_arm": [
4414+
"std",
4415+
"small"
4416+
]
4417+
}
44074418
},
44084419
"ARM_MPS2_M0": {
44094420
"inherits": [

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