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Merge pull request #2432 from jeremybrodt/max326xx_bugfix
[MAX326xx] Bug fixes and clean up.
2 parents 64a30a0 + 7be00b8 commit 0f2566b

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18 files changed

+115
-60
lines changed

18 files changed

+115
-60
lines changed

‎hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/dac_regs.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -103,7 +103,7 @@ typedef struct {
103103
__IO uint8_t output_8; /* 0x0000 Write to push values to DAC output FIFO */
104104
__IO uint16_t output_16; /* 0x0000 Write to push values to DAC output FIFO */
105105
};
106-
} mxc_dac_fifo_t;
106+
} mxc_dac_fifo_regs_t;
107107

108108
/*
109109
Register offsets for module DAC12.

‎hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/gpio_regs.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -459,12 +459,12 @@ typedef struct {
459459
#define MXC_S_GPIO_OUT_MODE_PIN7_FAST_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN7_POS))
460460
#define MXC_S_GPIO_OUT_MODE_PIN7_FAST_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE << MXC_F_GPIO_OUT_MODE_PIN7_POS))
461461

462-
#define MXC_V_GPIO_INT_MODE_DISABLED ((uint32_t)(0x00000000UL))
462+
#define MXC_V_GPIO_INT_MODE_DISABLE ((uint32_t)(0x00000000UL))
463463
#define MXC_V_GPIO_INT_MODE_FALLING_EDGE ((uint32_t)(0x00000001UL))
464464
#define MXC_V_GPIO_INT_MODE_RISING_EDGE ((uint32_t)(0x00000002UL))
465-
#define MXC_V_GPIO_INT_MODE_BOTH_EDGES ((uint32_t)(0x00000003UL))
466-
#define MXC_V_GPIO_INT_MODE_LOW_LEVEL ((uint32_t)(0x00000004UL))
467-
#define MXC_V_GPIO_INT_MODE_HIGH_LEVEL ((uint32_t)(0x00000005UL))
465+
#define MXC_V_GPIO_INT_MODE_ANY_EDGE ((uint32_t)(0x00000003UL))
466+
#define MXC_V_GPIO_INT_MODE_LOW_LVL ((uint32_t)(0x00000004UL))
467+
#define MXC_V_GPIO_INT_MODE_HIGH_LVL ((uint32_t)(0x00000005UL))
468468

469469
#ifdef __cplusplus
470470
}

‎hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/max32600.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -656,10 +656,10 @@ typedef enum {
656656

657657
/*******************************************************************************/
658658

659-
#define BITBAND(reg, bit) ((0xf0000000 & (uint32_t)(reg)) + 0x2000000 + (((uint32_t)(reg) & 0x0fffffff) << 5) + ((bit) << 2))
660-
#define BITBAND_ClrBit(reg, bit) *(volatile uint32_t *)BITBAND(reg, bit) = 0
661-
#define BITBAND_SetBit(reg, bit) *(volatile uint32_t *)BITBAND(reg, bit) = 1
662-
#define BITBAND_GetBit(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit))
659+
#define BITBAND(reg, bit) ((0xf0000000 & (uint32_t)(reg)) + 0x2000000 + (((uint32_t)(reg) & 0x0fffffff) << 5) + ((bit) << 2))
660+
#define MXC_CLRBIT(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit) = 0)
661+
#define MXC_SETBIT(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit) = 1)
662+
#define MXC_GETBIT(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit))
663663

664664
/*******************************************************************************/
665665

‎hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/spi_regs.h

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -119,6 +119,16 @@ typedef struct {
119119
#define MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK_POS 24
120120
#define MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK_POS))
121121

122+
#define MXC_V_SPI_MSTR_CFG_PAGE_SIZE_4B ((uint32_t)0x00000000UL)
123+
#define MXC_V_SPI_MSTR_CFG_PAGE_SIZE_8B ((uint32_t)0x00000001UL)
124+
#define MXC_V_SPI_MSTR_CFG_PAGE_SIZE_16B ((uint32_t)0x00000002UL)
125+
#define MXC_V_SPI_MSTR_CFG_PAGE_SIZE_32B ((uint32_t)0x00000003UL)
126+
127+
#define MXC_S_SPI_MSTR_CFG_PAGE_4B (MXC_V_SPI_MSTR_CFG_PAGE_SIZE_4B << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS)
128+
#define MXC_S_SPI_MSTR_CFG_PAGE_8B (MXC_V_SPI_MSTR_CFG_PAGE_SIZE_8B << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS)
129+
#define MXC_S_SPI_MSTR_CFG_PAGE_16B (MXC_V_SPI_MSTR_CFG_PAGE_SIZE_16B << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS)
130+
#define MXC_S_SPI_MSTR_CFG_PAGE_32B (MXC_V_SPI_MSTR_CFG_PAGE_SIZE_32B << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS)
131+
122132
#define MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY_POS 0
123133
#define MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY ((uint32_t)(0x000000FFUL << MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY_POS))
124134
#define MXC_F_SPI_SS_SR_POLARITY_FC_POLARITY_POS 8

‎hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -130,9 +130,9 @@ void Trim_RO(void)
130130
MXC_ADCCFG->ro_cal1 = (MXC_ADCCFG->ro_cal1 & ~MXC_F_ADC_RO_CAL1_TRM_INIT) |
131131
((trim << MXC_F_ADC_RO_CAL1_TRM_INIT_POS) & MXC_F_ADC_RO_CAL1_TRM_INIT);
132132
MXC_ADCCFG->ro_cal0 = (MXC_ADCCFG->ro_cal0 & ~MXC_F_ADC_RO_CAL0_TRM_MU) | (0x04 << MXC_F_ADC_RO_CAL0_TRM_MU_POS);
133-
BITBAND_SetBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_LOAD_POS);
134-
BITBAND_SetBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS);
135-
BITBAND_SetBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_RUN_POS);
133+
MXC_SETBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_LOAD_POS);
134+
MXC_SETBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS);
135+
MXC_SETBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_RUN_POS);
136136

137137
SysTick->LOAD = 1635; /* about 50ms, based on a 32KHz systick clock */
138138
SysTick->VAL = 0;
@@ -142,7 +142,7 @@ void Trim_RO(void)
142142
SysTick->CTRL = 0;
143143

144144
trim = (MXC_ADCCFG->ro_cal0 & MXC_F_ADC_RO_CAL0_RO_TRM) >> (MXC_F_ADC_RO_CAL0_RO_TRM_POS + 2);
145-
BITBAND_ClrBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS);
145+
MXC_CLRBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS);
146146
MXC_PWRSEQ->reg5 = (MXC_PWRSEQ->reg5 & ~MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF) |
147147
((trim << MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF_POS) & MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF);
148148

‎hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/dac_regs.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -103,7 +103,7 @@ typedef struct {
103103
__IO uint8_t output_8; /* 0x0000 Write to push values to DAC output FIFO */
104104
__IO uint16_t output_16; /* 0x0000 Write to push values to DAC output FIFO */
105105
};
106-
} mxc_dac_fifo_t;
106+
} mxc_dac_fifo_regs_t;
107107

108108
/*
109109
Register offsets for module DAC12.

‎hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/gpio_regs.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -459,12 +459,12 @@ typedef struct {
459459
#define MXC_S_GPIO_OUT_MODE_PIN7_FAST_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN7_POS))
460460
#define MXC_S_GPIO_OUT_MODE_PIN7_FAST_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE << MXC_F_GPIO_OUT_MODE_PIN7_POS))
461461

462-
#define MXC_V_GPIO_INT_MODE_DISABLED ((uint32_t)(0x00000000UL))
462+
#define MXC_V_GPIO_INT_MODE_DISABLE ((uint32_t)(0x00000000UL))
463463
#define MXC_V_GPIO_INT_MODE_FALLING_EDGE ((uint32_t)(0x00000001UL))
464464
#define MXC_V_GPIO_INT_MODE_RISING_EDGE ((uint32_t)(0x00000002UL))
465-
#define MXC_V_GPIO_INT_MODE_BOTH_EDGES ((uint32_t)(0x00000003UL))
466-
#define MXC_V_GPIO_INT_MODE_LOW_LEVEL ((uint32_t)(0x00000004UL))
467-
#define MXC_V_GPIO_INT_MODE_HIGH_LEVEL ((uint32_t)(0x00000005UL))
465+
#define MXC_V_GPIO_INT_MODE_ANY_EDGE ((uint32_t)(0x00000003UL))
466+
#define MXC_V_GPIO_INT_MODE_LOW_LVL ((uint32_t)(0x00000004UL))
467+
#define MXC_V_GPIO_INT_MODE_HIGH_LVL ((uint32_t)(0x00000005UL))
468468

469469
#ifdef __cplusplus
470470
}

‎hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/max32610.h

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -109,7 +109,6 @@ typedef enum IRQn_Type {
109109
#include <core_cm3.h> /* Processor and core peripherals */
110110
#include "system_max32610.h" /* System Header */
111111

112-
113112
/* ================================================================================ */
114113
/* ================== Device Specific Memory Section ================== */
115114
/* ================================================================================ */
@@ -126,7 +125,6 @@ typedef enum IRQn_Type {
126125
/*******************************************************************************/
127126
/* General Purpose I/O Ports (GPIO) */
128127

129-
130128
#define MXC_BASE_GPIO ((uint32_t)0x40000000UL)
131129
#define MXC_GPIO ((mxc_gpio_regs_t *)MXC_BASE_GPIO)
132130
#define MXC_BASE_GPIO_BITBAND ((uint32_t)0x42000000UL)
@@ -645,10 +643,10 @@ typedef enum {
645643

646644
/*******************************************************************************/
647645

648-
#define BITBAND(reg, bit) ((0xf0000000 & (uint32_t)(reg)) + 0x2000000 + (((uint32_t)(reg) & 0x0fffffff) << 5) + ((bit) << 2))
649-
#define BITBAND_ClrBit(reg, bit) *(volatile uint32_t *)BITBAND(reg, bit) = 0
650-
#define BITBAND_SetBit(reg, bit) *(volatile uint32_t *)BITBAND(reg, bit) = 1
651-
#define BITBAND_GetBit(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit))
646+
#define BITBAND(reg, bit) ((0xf0000000 & (uint32_t)(reg)) + 0x2000000 + (((uint32_t)(reg) & 0x0fffffff) << 5) + ((bit) << 2))
647+
#define MXC_CLRBIT(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit) = 0)
648+
#define MXC_SETBIT(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit) = 1)
649+
#define MXC_GETBIT(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit))
652650

653651
/*******************************************************************************/
654652

‎hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/system_max32610.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -130,9 +130,9 @@ void Trim_RO(void)
130130
MXC_ADCCFG->ro_cal1 = (MXC_ADCCFG->ro_cal1 & ~MXC_F_ADC_RO_CAL1_TRM_INIT) |
131131
((trim << MXC_F_ADC_RO_CAL1_TRM_INIT_POS) & MXC_F_ADC_RO_CAL1_TRM_INIT);
132132
MXC_ADCCFG->ro_cal0 = (MXC_ADCCFG->ro_cal0 & ~MXC_F_ADC_RO_CAL0_TRM_MU) | (0x04 << MXC_F_ADC_RO_CAL0_TRM_MU_POS);
133-
BITBAND_SetBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_LOAD_POS);
134-
BITBAND_SetBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS);
135-
BITBAND_SetBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_RUN_POS);
133+
MXC_SETBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_LOAD_POS);
134+
MXC_SETBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS);
135+
MXC_SETBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_RUN_POS);
136136

137137
SysTick->LOAD = 1635; /* about 50ms, based on a 32KHz systick clock */
138138
SysTick->VAL = 0;
@@ -142,7 +142,7 @@ void Trim_RO(void)
142142
SysTick->CTRL = 0;
143143

144144
trim = (MXC_ADCCFG->ro_cal0 & MXC_F_ADC_RO_CAL0_RO_TRM) >> (MXC_F_ADC_RO_CAL0_RO_TRM_POS + 2);
145-
BITBAND_ClrBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS);
145+
MXC_CLRBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS);
146146
MXC_PWRSEQ->reg5 = (MXC_PWRSEQ->reg5 & ~MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF) |
147147
((trim << MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF_POS) & MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF);
148148

‎hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/usb_regs.h

Lines changed: 28 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -305,7 +305,6 @@ typedef struct {
305305
#define MXC_F_USB_SETUP1_BYTE7_POS 24
306306
#define MXC_F_USB_SETUP1_BYTE7 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE7_POS))
307307

308-
309308
#define MXC_F_USB_EP0_EP_DIR_POS 0
310309
#define MXC_F_USB_EP0_EP_DIR ((uint32_t)(0x00000003UL << MXC_F_USB_EP0_EP_DIR_POS))
311310
#define MXC_F_USB_EP0_EP_BUF2_POS 3
@@ -442,6 +441,34 @@ typedef struct {
442441
#define MXC_F_USB_EP7_EP_ST_ACK_POS 10
443442
#define MXC_F_USB_EP7_EP_ST_ACK ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_ST_ACK_POS))
444443

444+
#define MXC_F_USB_EP_DIR_POS (0)
445+
#define MXC_F_USB_EP_DIR ((uint32_t)(0x00000003UL << MXC_F_USB_EP_DIR_POS))
446+
447+
#define MXC_V_USB_EP_DIR_DISABLE ((uint32_t)0x00000000UL)
448+
#define MXC_V_USB_EP_DIR_OUT ((uint32_t)0x00000001UL)
449+
#define MXC_V_USB_EP_DIR_IN ((uint32_t)0x00000002UL)
450+
#define MXC_V_USB_EP_DIR_CONTROL ((uint32_t)0x00000003UL)
451+
452+
#define MXC_S_USB_EP_DIR_DISABLE (MXC_V_USB_EP_DIR_DISABLE << MXC_F_USB_EP_DIR_POS)
453+
#define MXC_S_USB_EP_DIR_OUT (MXC_V_USB_EP_DIR_OUT << MXC_F_USB_EP_DIR_POS)
454+
#define MXC_S_USB_EP_DIR_IN (MXC_V_USB_EP_DIR_IN << MXC_F_USB_EP_DIR_POS)
455+
#define MXC_S_USB_EP_DIR_CONTROL (MXC_V_USB_EP_DIR_CONTROL << MXC_F_USB_EP_DIR_POS)
456+
457+
#define MXC_F_USB_EP_BUF2_POS (3)
458+
#define MXC_F_USB_EP_BUF2 ((uint32_t)(0x00000001UL << MXC_F_USB_EP_BUF2_POS))
459+
#define MXC_F_USB_EP_INTEN_POS (4)
460+
#define MXC_F_USB_EP_INT_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP_INTEN_POS))
461+
#define MXC_F_USB_EP_NAK_EN_POS (5)
462+
#define MXC_F_USB_EP_NAK_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP_NAK_EN_POS))
463+
#define MXC_F_USB_EP_DT_POS (6)
464+
#define MXC_F_USB_EP_DT ((uint32_t)(0x00000001UL << MXC_F_USB_EP_DT_POS))
465+
#define MXC_F_USB_EP_STALL_POS (8)
466+
#define MXC_F_USB_EP_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP_STALL_POS))
467+
#define MXC_F_USB_EP_ST_STALL_POS (9)
468+
#define MXC_F_USB_EP_ST_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP_ST_STALL_POS))
469+
#define MXC_F_USB_EP_ST_ACK_POS (10)
470+
#define MXC_F_USB_EP_ST_ACK ((uint32_t)(0x00000001UL << MXC_F_USB_EP_ST_ACK_POS))
471+
445472
#ifdef __cplusplus
446473
}
447474
#endif

‎hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/analogout_api.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ void analogout_init(dac_t *obj, PinName pin)
4747

4848
// Set the object pointer
4949
obj->dac = ((mxc_dac_regs_t*)MXC_DAC_GET_DAC((pin & 0x3)));
50-
obj->dac_fifo = ((mxc_dac_fifo_t*)MXC_DAC_GET_FIFO((pin & 0x3)));
50+
obj->dac_fifo = ((mxc_dac_fifo_regs_t*)MXC_DAC_GET_FIFO((pin & 0x3)));
5151
obj->index = (pin & 0x3);
5252

5353
// Set the ADC clock to the system clock frequency
@@ -142,7 +142,7 @@ void analogout_init(dac_t *obj, PinName pin)
142142
(MXC_E_AFE_REF_VOLT_SEL_1500 << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS)));
143143

144144
// Disable interpolation
145-
obj->dac->ctrl0 &= MXC_F_DAC_CTRL0_INTERP_MODE;
145+
obj->dac->ctrl0 &= ~MXC_F_DAC_CTRL0_INTERP_MODE;
146146
}
147147

148148
//******************************************************************************

‎hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/i2c_api.c

Lines changed: 22 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@
3030
* ownership rights.
3131
*******************************************************************************
3232
*/
33-
33+
3434
#include "mbed_assert.h"
3535
#include "i2c_api.h"
3636
#include "cmsis.h"
@@ -228,17 +228,19 @@ int i2c_byte_write(i2c_t *obj, int data)
228228
obj->i2c->trans |= MXC_F_I2CM_TRANS_TX_START;
229229

230230
// Wait for the FIFO to be empty
231-
while(!(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_FIFO_EMPTY)) {}
231+
while (!(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_FIFO_EMPTY));
232232

233-
if(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_NACKED) {
234-
return 1;
233+
if (obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_NACKED) {
234+
i2c_reset(obj);
235+
return 0;
235236
}
236237

237-
if(obj->i2c->intfl & (MXC_F_I2CM_INTFL_TX_TIMEOUT | MXC_F_I2CM_INTFL_TX_LOST_ARBITR)) {
238+
if (obj->i2c->intfl & (MXC_F_I2CM_INTFL_TX_TIMEOUT | MXC_F_I2CM_INTFL_TX_LOST_ARBITR)) {
239+
i2c_reset(obj);
238240
return 2;
239241
}
240-
241-
return 0;
242+
243+
return 1;
242244
}
243245

244246
int i2c_byte_read(i2c_t *obj, int last)
@@ -256,6 +258,7 @@ int i2c_byte_read(i2c_t *obj, int last)
256258
}
257259

258260
if ((err = write_tx_fifo(obj, fifo_value)) != 0) {
261+
i2c_reset(obj);
259262
return err;
260263
}
261264

@@ -264,7 +267,8 @@ int i2c_byte_read(i2c_t *obj, int last)
264267
int timeout = MXC_I2CM_RX_TIMEOUT;
265268
while (!(obj->i2c->intfl & MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY) &&
266269
(!(obj->i2c->bb & MXC_F_I2CM_BB_RX_FIFO_CNT))) {
267-
if ((--timeout < 0) || !(obj->i2c->trans & MXC_F_I2CM_TRANS_TX_IN_PROGRESS)) {
270+
if ((--timeout < 0) || (obj->i2c->trans & (MXC_F_I2CM_TRANS_TX_TIMEOUT |
271+
MXC_F_I2CM_TRANS_TX_LOST_ARBITR | MXC_F_I2CM_TRANS_TX_NACKED))) {
268272
break;
269273
}
270274
}
@@ -274,6 +278,8 @@ int i2c_byte_read(i2c_t *obj, int last)
274278
return *obj->rxfifo;
275279
}
276280

281+
i2c_reset(obj);
282+
277283
return -1;
278284
}
279285

@@ -291,6 +297,7 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
291297

292298
// write the address to the fifo
293299
if ((err = write_tx_fifo(obj, (MXC_S_I2CM_TRANS_TAG_START | address))) != 0) { // start + addr (write)
300+
i2c_reset(obj);
294301
return err;
295302
}
296303
obj->start_pending = 0;
@@ -319,13 +326,15 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
319326
obj->stop_pending = 1;
320327
int timeout = MXC_I2CM_TX_TIMEOUT;
321328
// Wait for TX fifo to be empty
322-
while(!(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_FIFO_EMPTY) && timeout--) {}
329+
while (!(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_FIFO_EMPTY) && timeout--);
323330
}
324331

325332
if (retval == 0) {
326333
return length;
327334
}
328335

336+
i2c_reset(obj);
337+
329338
return retval;
330339
}
331340

@@ -379,7 +388,8 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
379388
while (i < length) {
380389
while (!(obj->i2c->intfl & MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY) &&
381390
(!(obj->i2c->bb & MXC_F_I2CM_BB_RX_FIFO_CNT))) {
382-
if ((--timeout < 0) || !(obj->i2c->trans & MXC_F_I2CM_TRANS_TX_IN_PROGRESS)) {
391+
if ((--timeout < 0) || (obj->i2c->trans & (MXC_F_I2CM_TRANS_TX_TIMEOUT |
392+
MXC_F_I2CM_TRANS_TX_LOST_ARBITR | MXC_F_I2CM_TRANS_TX_NACKED))) {
383393
retval = -3;
384394
goto read_done;
385395
}
@@ -412,5 +422,7 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
412422
return length;
413423
}
414424

425+
i2c_reset(obj);
426+
415427
return retval;
416428
}

‎hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/objects.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,7 @@ struct dac_s {
101101
int index;
102102
uint16_t out;
103103
mxc_dac_regs_t *dac;
104-
mxc_dac_fifo_t * dac_fifo;
104+
mxc_dac_fifo_regs_t * dac_fifo;
105105
};
106106

107107
typedef struct {

‎hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/spi_api.c

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -88,10 +88,6 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
8888
obj->spi->gen_ctrl = (MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN |
8989
MXC_F_SPI_GEN_CTRL_TX_FIFO_EN |
9090
MXC_F_SPI_GEN_CTRL_RX_FIFO_EN );
91-
92-
// Give instance the default settings
93-
spi_format(obj, DEFAULT_CHAR, DEFAULT_MODE, 0);
94-
spi_frequency(obj, DEFAULT_FREQ);
9591
}
9692

9793
//******************************************************************************

‎hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogout_api.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ void analogout_init(dac_t *obj, PinName pin)
4747

4848
// Set the object pointer
4949
obj->dac = ((mxc_dac_regs_t*)MXC_DAC_GET_DAC((pin & 0x3)));
50-
obj->dac_fifo = ((mxc_dac_fifo_t*)MXC_DAC_GET_FIFO((pin & 0x3)));
50+
obj->dac_fifo = ((mxc_dac_fifo_regs_t*)MXC_DAC_GET_FIFO((pin & 0x3)));
5151
obj->index = (pin & 0x3);
5252

5353
// Set the ADC clock to the system clock frequency
@@ -142,7 +142,7 @@ void analogout_init(dac_t *obj, PinName pin)
142142
(MXC_E_AFE_REF_VOLT_SEL_1500 << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS)));
143143

144144
// Disable interpolation
145-
obj->dac->ctrl0 &= MXC_F_DAC_CTRL0_INTERP_MODE;
145+
obj->dac->ctrl0 &= ~MXC_F_DAC_CTRL0_INTERP_MODE;
146146
}
147147

148148
//******************************************************************************

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