STM32WB clean SetSysClock

Author: jeromecoutant

targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TARGET_NUCLEO_WB55RG/system_clock.c

@@ -1,5 +1,6 @@
 /* mbed Microcontroller Library
  * Copyright (c) 2019 ARM Limited
+ * Copyright (c) 2019 STMicroelectronics
  * SPDX-License-Identifier: Apache-2.0
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -31,46 +32,9 @@
 #include "stm32wbxx.h"
 #include "mbed_error.h"
 #include "stm32wbxx_ll_hsem.h"
-#include "stm32wbxx_ll_hsem.h"
 #include "otp.h"
-#include "hw_conf.h" /* Common BLE file where BLE shared resources are defined */
+// #include "hw_conf.h" /* Common BLE file where BLE shared resources are defined */
 
-static void Configure_RF_Clock_Sources(void)
-{
-    static uint8_t RF_ON = 0;
-
-    if (!RF_ON) {
-        // Reset backup domain
-        if ((LL_RCC_IsActiveFlag_PINRST()) && (!LL_RCC_IsActiveFlag_SFTRST())) {
-            // Write twice the value to flush the APB-AHB bridge
-            // This bit shall be written in the register before writing the next one
-            HAL_PWR_EnableBkUpAccess();
-            HAL_PWR_EnableBkUpAccess();
-            __HAL_RCC_BACKUPRESET_FORCE();
-            __HAL_RCC_BACKUPRESET_RELEASE();
-        }
-
-        /**
-         * Select LSE clock
-         */
-        LL_RCC_LSE_Enable();
-        while (!LL_RCC_LSE_IsReady());
-
-        /**
-         * Select wakeup source of BLE RF
-         */
-        LL_RCC_SetRFWKPClockSource(LL_RCC_RFWKP_CLKSOURCE_LSE);
-
-        /**
-         * Switch OFF LSI
-         */
-        LL_RCC_LSI1_Disable();
-
-        RF_ON = 1;
-    }
-
-    return;
-}
 
 static void Config_HSE(void)
 {
@@ -102,22 +66,27 @@ void SetSysClock(void)
     RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
     RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
 
+    __HAL_RCC_HSEM_CLK_ENABLE();
+
     while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID));
 
     Config_HSE();
 
-    /* Configure the main internal regulator output voltage */
+    __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
     __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
 
     /* Initializes the CPU, AHB and APB busses clocks */
-    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE;
     RCC_OscInitStruct.HSEState = RCC_HSE_ON;
     RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+    RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+    RCC_OscInitStruct.LSEState = RCC_LSE_ON;
     RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
     RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
     if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
         error("HAL_RCC_OscConfig error\n");
     }
+
     /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
     */
     RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2
@@ -129,33 +98,27 @@ void SetSysClock(void)
     RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
     RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1;
     RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
-
-    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
         error("HAL_RCC_ClockConfig error\n");
     }
+
     /** Initializes the peripherals clocks
     */
-    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS;
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_RFWAKEUP | RCC_PERIPHCLK_RNG;
+    PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
+    PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
     PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE;
-    PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE0;
-
+    PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1;
     if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
         error("HAL_RCCEx_PeriphCLKConfig error\n");
     }
 
-    /**
-     * Select HSI as system clock source after Wake Up from Stop mode
-     */
-    LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
+    LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA);
+    LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40);
+    // LL_PWR_SMPS_Enable();
 
-    /**
-     * Set RNG on HSI48
-     */
-    LL_RCC_HSI48_Enable();
-    while (!LL_RCC_HSI48_IsReady());
-    LL_RCC_SetCLK48ClockSource(LL_RCC_CLK48_CLKSOURCE_HSI48);
-
-    Configure_RF_Clock_Sources();
+    /* Select HSI as system clock source after Wake Up from Stop mode */
+    LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
 
     LL_HSEM_ReleaseLock(HSEM, CFG_HW_RCC_SEMID, 0);
 }