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Marcus ChangTacoGrandeTX
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Fix ITM on NRF52 series
The ITM must be initialized before the SoftDevice, but due to the lazy initialization in C++ on (at least) GCC the ITM init call might happen too late. This commit moves the initialization code into the NRF52 system startup file.
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3 files changed

+69
-39
lines changed

3 files changed

+69
-39
lines changed

targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/system_nrf52.c

Lines changed: 27 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -79,13 +79,13 @@ void SystemInit(void)
7979
NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
8080
NRF_P0->PIN_CNF[20] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
8181
#endif
82-
82+
8383
/* Workaround for Errata 12 "COMP: Reference ladder not correctly calibrated" found at the Errata document
8484
for your device located at https://infocenter.nordicsemi.com/ */
8585
if (errata_12()){
8686
*(volatile uint32_t *)0x40013540 = (*(uint32_t *)0x10000324 & 0x00001F00) >> 8;
8787
}
88-
88+
8989
/* Workaround for Errata 16 "System: RAM may be corrupt on wakeup from CPU IDLE" found at the Errata document
9090
for your device located at https://infocenter.nordicsemi.com/ */
9191
if (errata_16()){
@@ -154,15 +154,15 @@ void SystemInit(void)
154154
if (errata_108()){
155155
*(volatile uint32_t *)0x40000EE4 = *(volatile uint32_t *)0x10000258 & 0x0000004F;
156156
}
157-
157+
158158
/* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
159159
for your device located at https://infocenter.nordicsemi.com/ */
160160
if (errata_136()){
161161
if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
162162
NRF_POWER->RESETREAS = ~POWER_RESETREAS_RESETPIN_Msk;
163163
}
164164
}
165-
165+
166166
/* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
167167
* compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
168168
* operations are not used in your code. */
@@ -216,6 +216,29 @@ void SystemInit(void)
216216
while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0) {
217217
// Do nothing.
218218
}
219+
220+
/**
221+
* Mbed HAL specific code section.
222+
*
223+
* The ITM has to be initialized before the SoftDevice which weren't guaranteed using the normal API.
224+
*/
225+
#if defined (DEVICE_ITM)
226+
/* Enable SWO trace functionality */
227+
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
228+
NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
229+
230+
/* set SWO clock speed to 4 MHz */
231+
NRF_CLOCK->TRACECONFIG = (NRF_CLOCK->TRACECONFIG & ~CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk) |
232+
(CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos);
233+
234+
/* set SWO pin */
235+
NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) |
236+
(GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
237+
(GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
238+
239+
/* set prescaler */
240+
TPI->ACPR = 0;
241+
#endif
219242
}
220243

221244

targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/system_nrf52840.c

Lines changed: 39 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@ NOTICE: This file has been modified by Nordic Semiconductor ASA.
2222

2323
/* NOTE: Template files (including this one) are application specific and therefore expected to
2424
be copied into the application project folder prior to its use! */
25-
25+
2626
#include <stdint.h>
2727
#include <stdbool.h>
2828
#include "nrf.h"
@@ -76,15 +76,15 @@ void SystemInit(void)
7676
NRF_P0->PIN_CNF[11] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
7777
NRF_P1->PIN_CNF[9] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
7878
#endif
79-
79+
8080
/* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
8181
for your device located at https://infocenter.nordicsemi.com/ */
8282
if (errata_36()){
8383
NRF_CLOCK->EVENTS_DONE = 0;
8484
NRF_CLOCK->EVENTS_CTTO = 0;
8585
NRF_CLOCK->CTIV = 0;
8686
}
87-
87+
8888
/* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
8989
for your device located at https://infocenter.nordicsemi.com/ */
9090
if (errata_66()){
@@ -106,39 +106,39 @@ void SystemInit(void)
106106
NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
107107
NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
108108
}
109-
109+
110110
/* Workaround for Errata 98 "NFCT: Not able to communicate with the peer" found at the Errata document
111111
for your device located at https://infocenter.nordicsemi.com/ */
112112
if (errata_98()){
113113
*(volatile uint32_t *)0x4000568Cul = 0x00038148ul;
114114
}
115-
115+
116116
/* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document
117117
for your device located at https://infocenter.nordicsemi.com/ */
118118
if (errata_103()){
119119
NRF_CCM->MAXPACKETSIZE = 0xFBul;
120120
}
121-
121+
122122
/* Workaround for Errata 115 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
123123
for your device located at https://infocenter.nordicsemi.com/ */
124124
if (errata_115()){
125125
*(volatile uint32_t *)0x40000EE4 = (*(volatile uint32_t *)0x40000EE4 & 0xFFFFFFF0) | (*(uint32_t *)0x10000258 & 0x0000000F);
126126
}
127-
127+
128128
/* Workaround for Errata 120 "QSPI: Data read or written is corrupted" found at the Errata document
129129
for your device located at https://infocenter.nordicsemi.com/ */
130130
if (errata_120()){
131131
*(volatile uint32_t *)0x40029640ul = 0x200ul;
132132
}
133-
133+
134134
/* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
135135
for your device located at https://infocenter.nordicsemi.com/ */
136136
if (errata_136()){
137137
if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
138138
NRF_POWER->RESETREAS = ~POWER_RESETREAS_RESETPIN_Msk;
139139
}
140140
}
141-
141+
142142
/* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
143143
* compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
144144
* operations are not used in your code. */
@@ -192,6 +192,29 @@ void SystemInit(void)
192192
while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0) {
193193
// Do nothing.
194194
}
195+
196+
/**
197+
* Mbed HAL specific code section.
198+
*
199+
* The ITM has to be initialized before the SoftDevice which weren't guaranteed using the normal API.
200+
*/
201+
#if defined (DEVICE_ITM)
202+
/* Enable SWO trace functionality */
203+
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
204+
NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
205+
206+
/* set SWO clock speed to 4 MHz */
207+
NRF_CLOCK->TRACECONFIG = (NRF_CLOCK->TRACECONFIG & ~CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk) |
208+
(CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos);
209+
210+
/* set SWO pin */
211+
NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) |
212+
(GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
213+
(GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
214+
215+
/* set prescaler */
216+
TPI->ACPR = 0;
217+
#endif
195218
}
196219

197220

@@ -200,7 +223,7 @@ static bool errata_36(void)
200223
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
201224
return true;
202225
}
203-
226+
204227
return false;
205228
}
206229

@@ -210,7 +233,7 @@ static bool errata_66(void)
210233
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
211234
return true;
212235
}
213-
236+
214237
return false;
215238
}
216239

@@ -220,7 +243,7 @@ static bool errata_98(void)
220243
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
221244
return true;
222245
}
223-
246+
224247
return false;
225248
}
226249

@@ -230,7 +253,7 @@ static bool errata_103(void)
230253
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
231254
return true;
232255
}
233-
256+
234257
return false;
235258
}
236259

@@ -240,7 +263,7 @@ static bool errata_115(void)
240263
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
241264
return true;
242265
}
243-
266+
244267
return false;
245268
}
246269

@@ -250,7 +273,7 @@ static bool errata_120(void)
250273
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
251274
return true;
252275
}
253-
276+
254277
return false;
255278
}
256279

@@ -260,7 +283,7 @@ static bool errata_136(void)
260283
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
261284
return true;
262285
}
263-
286+
264287
return false;
265288
}
266289

targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/itm_api.c

Lines changed: 3 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -18,27 +18,11 @@
1818

1919
#include "hal/itm_api.h"
2020

21-
#include "nrf.h"
22-
#include "nrf5x_lf_clk_helper.h"
23-
24-
/* SWO frequency: 4000 kHz */
2521
void itm_init(void)
2622
{
27-
/* Enable SWO trace functionality */
28-
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
29-
NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
30-
31-
/* set SWO clock speed to 4 MHz */
32-
NRF_CLOCK->TRACECONFIG = (NRF_CLOCK->TRACECONFIG & ~CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk) |
33-
(CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos);
34-
35-
/* set SWO pin */
36-
NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) |
37-
(GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
38-
(GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
39-
40-
/* set prescaler */
41-
TPI->ACPR = 0;
23+
/**
24+
* Initialization moved to system_nrf52840.c due to SoftDevice incompatibility.
25+
*/
4226
}
4327

4428
#endif

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