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author
Kyle Kearney
committed
Enable SDIO DeepSleep Callback
1 parent b005bf2 commit 1171a6f

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21 files changed

+1024
-575
lines changed

21 files changed

+1024
-575
lines changed

targets/TARGET_Cypress/TARGET_PSOC6/PinNamesTypes.h

Lines changed: 76 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -19,14 +19,83 @@
1919
#ifndef MBED_PINNAMESTYPES_H
2020
#define MBED_PINNAMESTYPES_H
2121

22-
#include "cmsis.h"
2322
#include "cyhal_gpio.h"
23+
#include "cybsp_types.h"
2424

25+
// Pin Modes
2526
#define PullNone CYHAL_GPIO_DRIVE_STRONG
26-
#define PullDefault CYHAL_GPIO_DRIVE_ANALOG
27+
#define PullDefault CYHAL_GPIO_DRIVE_NONE
2728
#define PullDown CYHAL_GPIO_DRIVE_PULLDOWN
2829
#define PullUp CYHAL_GPIO_DRIVE_PULLUP
2930

31+
// Arduino Headers
32+
#ifdef CYBSP_A0
33+
#define A0 CYBSP_A0
34+
#endif
35+
#ifdef CYBSP_A1
36+
#define A1 CYBSP_A1
37+
#endif
38+
#ifdef CYBSP_A2
39+
#define A2 CYBSP_A2
40+
#endif
41+
#ifdef CYBSP_A3
42+
#define A3 CYBSP_A3
43+
#endif
44+
#ifdef CYBSP_A4
45+
#define A4 CYBSP_A4
46+
#endif
47+
#ifdef CYBSP_A5
48+
#define A5 CYBSP_A5
49+
#endif
50+
#ifdef CYBSP_D0
51+
#define D0 CYBSP_D0
52+
#endif
53+
#ifdef CYBSP_D1
54+
#define D1 CYBSP_D1
55+
#endif
56+
#ifdef CYBSP_D2
57+
#define D2 CYBSP_D2
58+
#endif
59+
#ifdef CYBSP_D3
60+
#define D3 CYBSP_D3
61+
#endif
62+
#ifdef CYBSP_D4
63+
#define D4 CYBSP_D4
64+
#endif
65+
#ifdef CYBSP_D5
66+
#define D5 CYBSP_D5
67+
#endif
68+
#ifdef CYBSP_D6
69+
#define D6 CYBSP_D6
70+
#endif
71+
#ifdef CYBSP_D7
72+
#define D7 CYBSP_D7
73+
#endif
74+
#ifdef CYBSP_D8
75+
#define D8 CYBSP_D8
76+
#endif
77+
#ifdef CYBSP_D9
78+
#define D9 CYBSP_D9
79+
#endif
80+
#ifdef CYBSP_D10
81+
#define D10 CYBSP_D10
82+
#endif
83+
#ifdef CYBSP_D11
84+
#define D11 CYBSP_D11
85+
#endif
86+
#ifdef CYBSP_D12
87+
#define D12 CYBSP_D12
88+
#endif
89+
#ifdef CYBSP_D13
90+
#define D13 CYBSP_D13
91+
#endif
92+
#ifdef CYBSP_D14
93+
#define D14 CYBSP_D14
94+
#endif
95+
#ifdef CYBSP_D15
96+
#define D15 CYBSP_D15
97+
#endif
98+
3099
#ifdef __cplusplus
31100
extern "C" {
32101
#endif
@@ -37,6 +106,11 @@ typedef enum {
37106
} PinDirection;
38107

39108
typedef cyhal_gpio_drive_mode_t PinMode;
109+
typedef cyhal_gpio_t PinName;
110+
static inline PinName cyhal_gpio_to_rtos(cyhal_gpio_t pin)
111+
{
112+
return pin;
113+
}
40114

41115
#ifdef __cplusplus
42116
}

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/PinNames.h

Lines changed: 11 additions & 81 deletions
Original file line numberDiff line numberDiff line change
@@ -20,39 +20,8 @@
2020
#ifndef MBED_PINNAMES_H
2121
#define MBED_PINNAMES_H
2222

23-
#include "cmsis.h"
2423
#include "PinNamesTypes.h"
25-
#include "PortNames.h"
2624
#include "cyhal_pin_package.h"
27-
#include "cyhal_utils.h"
28-
29-
typedef cyhal_gpio_t PinName;
30-
31-
// Arduino connector namings
32-
#define A0 P10_0
33-
#define A1 P10_1
34-
#define A2 P10_2
35-
#define A3 P10_3
36-
#define A4 P10_4
37-
#define A5 P10_5
38-
39-
#define D0 P5_0
40-
#define D1 P5_1
41-
#define D2 P5_2
42-
#define D3 P5_3
43-
#define D4 P5_4
44-
#define D5 P5_5
45-
#define D6 P5_6
46-
#define D7 P0_2
47-
#define D8 P13_0
48-
#define D9 P13_1
49-
#define D10 P12_3
50-
#define D11 P12_0
51-
#define D12 P12_1
52-
#define D13 P12_2
53-
#define D14 P6_1
54-
#define D15 P6_0
55-
5625

5726
// Generic signal names
5827

@@ -64,46 +33,23 @@ typedef cyhal_gpio_t PinName;
6433
#define UART_RTS P5_2
6534
#define UART_CTS P5_3
6635

67-
#define SPI_MOSI P12_0
68-
#define SPI_MISO P12_1
69-
#define SPI_CLK P12_2
70-
#define SPI_CS P12_4
71-
72-
#define UART_RX P5_0
73-
#define UART_TX P5_1
74-
#define UART_RTS P5_2
75-
#define UART_CTS P5_3
76-
77-
#define BT_UART_RX P3_0
78-
#define BT_UART_TX P3_1
79-
#define BT_UART_CTS P3_3
80-
#define BT_UART_RTS P3_2
36+
#define LED1 P1_1
37+
#define LED2 P0_5
38+
#define LED3 P7_3
39+
#define LED4 P1_5
40+
#define LED5 P11_1
41+
#define LED_RED LED1
42+
#define LED_GREEN LED2
43+
#define LED_BLUE LED3
8144

82-
#define BT_PIN_POWER P3_4
83-
#define BT_PIN_HOST_WAKE P3_5
84-
#define BT_PIN_DEVICE_WAKE P4_0
8545
// Reset pin unavailable
86-
8746
#define SWITCH2 P0_4
88-
#define LED1 P13_7
89-
#define LED2 NC
90-
#define LED3 NC
91-
#define LED4 NC
92-
#define LED_RED LED1
93-
47+
#define SWITCH4 P1_4
9448
#define USER_BUTTON SWITCH2
9549
#define BUTTON1 USER_BUTTON
50+
#define BUTTON2 SWITCH4
9651

97-
#define PDM_DATA P10_5
98-
#define PDM_CLK P10_4
99-
#define THERM_OUT_1 P10_1
100-
#define THERM_OUT_2 P10_2
101-
#define THERM_OUT THERM_OUT_1
102-
#define THERM_VDD P10_3
103-
#define THERM_GND P10_0
104-
105-
#define CARD_DETECT_1 P13_5
106-
#define CARD_DETECT_2 P12_1
52+
#define CARD_DETECT_1 P13_7
10753
#define CARD_DETECT CARD_DETECT_1
10854
#define SD_CMD P12_4
10955
#define SD_CLK P12_5
@@ -132,23 +78,7 @@ typedef cyhal_gpio_t PinName;
13278
#define STDIO_UART_CTS UART_CTS
13379
#define STDIO_UART_RTS UART_RTS
13480

135-
#define CY_STDIO_UART_RX STDIO_UART_RX
136-
#define CY_STDIO_UART_TX STDIO_UART_TX
137-
#define CY_STDIO_UART_CTS STDIO_UART_CTS
138-
#define CY_STDIO_UART_RTS STDIO_UART_RTS
139-
140-
#define CY_BT_UART_RX BT_UART_RX
141-
#define CY_BT_UART_TX BT_UART_TX
142-
#define CY_BT_UART_CTS BT_UART_CTS
143-
#define CY_BT_UART_RTS BT_UART_RTS
144-
145-
#define CY_BT_PIN_POWER BT_PIN_POWER
146-
#define CY_BT_PIN_HOST_WAKE BT_PIN_HOST_WAKE
147-
#define CY_BT_PIN_DEVICE_WAKE BT_PIN_DEVICE_WAKE
148-
14981
#define USBTX UART_TX
15082
#define USBRX UART_RX
15183

152-
#define CY_WIFI_HOST_WAKE P2_7
153-
15484
#endif

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/cybsp_types.h

Lines changed: 26 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -23,14 +23,6 @@
2323
* limitations under the License.
2424
*******************************************************************************/
2525

26-
/**
27-
* \addtogroup group_bsp_cy8ckit_062s2_43012 CY8CKIT-062S2-43012
28-
* \ingroup group_bsp
29-
* \{
30-
* \defgroup group_bsp_cy8ckit_062s2_43012_macros Macros
31-
* \defgroup group_bsp_cy8ckit_062s2_43012_enums Enumerated Types
32-
*/
33-
3426
#pragma once
3527

3628
#include "cyhal.h"
@@ -39,9 +31,8 @@
3931
extern "C" {
4032
#endif
4133

42-
4334
/**
44-
* \addtogroup group_bsp_cy8ckit_062s2_43012_macros
35+
* \addtogroup group_bsp_pins Pin Mappings
4536
* \{
4637
*/
4738

@@ -98,18 +89,25 @@ extern "C" {
9889
#define CYBSP_WCO_OUT P0_1
9990

10091
/** Pin: WIFI SDIO D0 */
92+
/* Corresponds to: ioss[0].port[2].pin[0], sdhc[0] */
10193
#define CYBSP_WIFI_SDIO_D0 P2_0
10294
/** Pin: WIFI SDIO D1 */
95+
/* Corresponds to: ioss[0].port[2].pin[1], sdhc[0] */
10396
#define CYBSP_WIFI_SDIO_D1 P2_1
10497
/** Pin: WIFI SDIO D2 */
98+
/* Corresponds to: ioss[0].port[2].pin[2], sdhc[0] */
10599
#define CYBSP_WIFI_SDIO_D2 P2_2
106100
/** Pin: WIFI SDIO D3 */
101+
/* Corresponds to: ioss[0].port[2].pin[3], sdhc[0] */
107102
#define CYBSP_WIFI_SDIO_D3 P2_3
108103
/** Pin: WIFI SDIO CMD */
104+
/* Corresponds to: ioss[0].port[2].pin[4], sdhc[0] */
109105
#define CYBSP_WIFI_SDIO_CMD P2_4
110106
/** Pin: WIFI SDIO CLK */
107+
/* Corresponds to: ioss[0].port[2].pin[5], sdhc[0] */
111108
#define CYBSP_WIFI_SDIO_CLK P2_5
112109
/** Pin: WIFI ON */
110+
/* Corresponds to: ioss[0].port[2].pin[6], sdhc[0] */
113111
#define CYBSP_WIFI_WL_REG_ON P2_6
114112
/** Pin: WIFI Host Wakeup */
115113
#define CYBSP_WIFI_HOST_WAKE P4_1
@@ -125,17 +123,21 @@ extern "C" {
125123
/** Pin: BT Power */
126124
#define CYBSP_BT_POWER P3_4
127125
/** Pin: BT Host Wakeup */
128-
#define CYBSP_BT_HOST_WAKE P3_5
126+
#define CYBSP_BT_HOST_WAKE P4_0
129127
/** Pin: BT Device Wakeup */
130-
#define CYBSP_BT_DEVICE_WAKE P4_0
128+
#define CYBSP_BT_DEVICE_WAKE P3_5
131129

132130
/** Pin: UART RX */
131+
/* Corresponds to: ioss[0].port[5].pin[0], scb[5] */
133132
#define CYBSP_DEBUG_UART_RX P5_0
134133
/** Pin: UART TX */
134+
/* Corresponds to: ioss[0].port[5].pin[1], scb[5] */
135135
#define CYBSP_DEBUG_UART_TX P5_1
136136
/** Pin: UART RX */
137+
/* Corresponds to: ioss[0].port[5].pin[2], scb[5] */
137138
#define CYBSP_DEBUG_UART_RTS P5_2
138139
/** Pin: UART TX */
140+
/* Corresponds to: ioss[0].port[5].pin[3], scb[5] */
139141
#define CYBSP_DEBUG_UART_CTS P5_3
140142

141143
/** Pin: I2C SCL */
@@ -150,8 +152,8 @@ extern "C" {
150152
/** Pin: SWDCK */
151153
#define CYBSP_SWDCK P6_7
152154

153-
/** Pin: CapSesnse TX */
154-
#define CYBSP_CSD_TX P1_0
155+
/** Pin: CapSesnse RX */
156+
#define CYBSP_CSD_RX P1_0
155157
/** Pin: CapSesnse CINA */
156158
#define CYBSP_CINA P7_1
157159
/** Pin: CapSesnse CINB */
@@ -218,10 +220,10 @@ extern "C" {
218220
#define SW4 P1_4
219221

220222

221-
/** \} group_bsp_cy8ckit_062s2_43012_macros */
223+
/** \} group_bsp_cy8ckit_pins */
222224

223225
/**
224-
* \addtogroup group_bsp_cy8ckit_062s2_43012_enums
226+
* \addtogroup group_bsp_enums Enumerated Types
225227
* \{
226228
*/
227229

@@ -247,10 +249,15 @@ typedef enum
247249
CYBSP_LED_RGB_GREEN = LED5_RGB_G,
248250
CYBSP_LED_RGB_BLUE = LED5_RGB_B,
249251

252+
/* Corresponds to: ioss[0].port[11].pin[1] */
250253
CYBSP_USER_LED1 = LED9_R,
254+
/* Corresponds to: ioss[0].port[1].pin[5] */
251255
CYBSP_USER_LED2 = LED8_O,
256+
/* Corresponds to: ioss[0].port[1].pin[1] */
252257
CYBSP_USER_LED3 = CYBSP_LED_RGB_RED,
258+
/* Corresponds to: ioss[0].port[0].pin[5] */
253259
CYBSP_USER_LED4 = CYBSP_LED_RGB_GREEN,
260+
/* Corresponds to: ioss[0].port[7].pin[3] */
254261
CYBSP_USER_LED5 = CYBSP_LED_RGB_BLUE,
255262
CYBSP_USER_LED = CYBSP_USER_LED1,
256263
} cybsp_led_t;
@@ -259,16 +266,16 @@ typedef enum
259266
/** Enum defining the different user buttons available on the board. */
260267
typedef enum
261268
{
269+
/* Corresponds to: ioss[0].port[0].pin[4] */
262270
CYBSP_USER_BTN1 = SW2,
271+
/* Corresponds to: ioss[0].port[1].pin[4] */
263272
CYBSP_USER_BTN2 = SW4,
264273
CYBSP_USER_BTN = CYBSP_USER_BTN1,
265274
} cybsp_btn_t;
266275

267276

268-
/** \} group_bsp_cy8ckit_062s2_43012_enums */
277+
/** \} group_bsp_enums */
269278

270279
#if defined(__cplusplus)
271280
}
272281
#endif
273-
274-
/** \} group_bsp_cy8ckit_062s2_43012 */

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