NRF52: attempt to complete 86ce955 for ARMCC and IAR

Bernhard Schuster · Bernhard Schuster · commit 124e15f196ca · 2018-06-21T13:24:49.000+02:00
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct
@@ -35,7 +35,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE {
    .ANY (+RO)
   }
   RW_IRAM0 MBED_RAM0_START UNINIT MBED_RAM0_SIZE { ;no init section
-        *(*noinit)
+        *(*nvictable)
   }
   RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE {
    .ANY (+RW +ZI)
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf
@@ -54,8 +54,12 @@ define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
 define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
 
 initialize by copy { readwrite };
+do not initialize  { section .nvictable };
+place at address mem:__ICFEDIT_region_RAM_NVIC_start__ { section .nvictable };
+
 do not initialize  { section .noinit };
-place at address mem:__ICFEDIT_region_RAM_NVIC_start__ { section .noinit };
+place in RAM_region { section .noinit };
+
 
 keep { section .intvec };
 place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };

Original file line number	Diff line number	Diff line change
`@@ -35,7 +35,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE {`
`35`	`35`	`.ANY (+RO)`
`36`	`36`	`}`
`37`	`37`	`RW_IRAM0 MBED_RAM0_START UNINIT MBED_RAM0_SIZE { ;no init section`
`38`		`- (noinit)`
	`38`	`+ (nvictable)`
`39`	`39`	`}`
`40`	`40`	`RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE {`
`41`	`41`	`.ANY (+RW +ZI)`