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cy-opmKyle Kearney
cy-opm
authored and
Kyle Kearney
committed
Fix LPA pin configuration for two Cypress Targets
Fixes are for CY8CKIT_062S2_43012 and CY8CPROTO_062_4343W
1 parent 0ee6dfd commit 13f216d

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8 files changed

+179
-112
lines changed

8 files changed

+179
-112
lines changed

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -360,11 +360,11 @@ const cy_stc_gpio_pin_config_t CYBSP_BT_POWER_config =
360360
.channel_num = CYBSP_BT_POWER_PIN,
361361
};
362362
#endif //defined (CY_USING_HAL)
363-
const cy_stc_gpio_pin_config_t CYBSP_BT_HOST_WAKE_config =
363+
const cy_stc_gpio_pin_config_t CYBSP_BT_DEVICE_WAKE_config =
364364
{
365365
.outVal = 0,
366-
.driveMode = CY_GPIO_DM_ANALOG,
367-
.hsiom = CYBSP_BT_HOST_WAKE_HSIOM,
366+
.driveMode = CY_GPIO_DM_STRONG_IN_OFF,
367+
.hsiom = CYBSP_BT_DEVICE_WAKE_HSIOM,
368368
.intEdge = CY_GPIO_INTR_DISABLE,
369369
.intMask = 0UL,
370370
.vtrip = CY_GPIO_VTRIP_CMOS,
@@ -377,18 +377,18 @@ const cy_stc_gpio_pin_config_t CYBSP_BT_HOST_WAKE_config =
377377
.vohSel = 0UL,
378378
};
379379
#if defined (CY_USING_HAL)
380-
const cyhal_resource_inst_t CYBSP_BT_HOST_WAKE_obj =
380+
const cyhal_resource_inst_t CYBSP_BT_DEVICE_WAKE_obj =
381381
{
382382
.type = CYHAL_RSC_GPIO,
383-
.block_num = CYBSP_BT_HOST_WAKE_PORT_NUM,
384-
.channel_num = CYBSP_BT_HOST_WAKE_PIN,
383+
.block_num = CYBSP_BT_DEVICE_WAKE_PORT_NUM,
384+
.channel_num = CYBSP_BT_DEVICE_WAKE_PIN,
385385
};
386386
#endif //defined (CY_USING_HAL)
387-
const cy_stc_gpio_pin_config_t CYBSP_BT_DEVICE_WAKE_config =
387+
const cy_stc_gpio_pin_config_t CYBSP_BT_HOST_WAKE_config =
388388
{
389389
.outVal = 0,
390-
.driveMode = CY_GPIO_DM_STRONG_IN_OFF,
391-
.hsiom = CYBSP_BT_DEVICE_WAKE_HSIOM,
390+
.driveMode = CY_GPIO_DM_ANALOG,
391+
.hsiom = CYBSP_BT_HOST_WAKE_HSIOM,
392392
.intEdge = CY_GPIO_INTR_DISABLE,
393393
.intMask = 0UL,
394394
.vtrip = CY_GPIO_VTRIP_CMOS,
@@ -401,11 +401,11 @@ const cy_stc_gpio_pin_config_t CYBSP_BT_DEVICE_WAKE_config =
401401
.vohSel = 0UL,
402402
};
403403
#if defined (CY_USING_HAL)
404-
const cyhal_resource_inst_t CYBSP_BT_DEVICE_WAKE_obj =
404+
const cyhal_resource_inst_t CYBSP_BT_HOST_WAKE_obj =
405405
{
406406
.type = CYHAL_RSC_GPIO,
407-
.block_num = CYBSP_BT_DEVICE_WAKE_PORT_NUM,
408-
.channel_num = CYBSP_BT_DEVICE_WAKE_PIN,
407+
.block_num = CYBSP_BT_HOST_WAKE_PORT_NUM,
408+
.channel_num = CYBSP_BT_HOST_WAKE_PIN,
409409
};
410410
#endif //defined (CY_USING_HAL)
411411
const cy_stc_gpio_pin_config_t CYBSP_EZI2C_SCL_config =
@@ -841,14 +841,14 @@ void init_cycfg_pins(void)
841841
cyhal_hwmgr_reserve(&CYBSP_BT_POWER_obj);
842842
#endif //defined (CY_USING_HAL)
843843

844-
Cy_GPIO_Pin_Init(CYBSP_BT_HOST_WAKE_PORT, CYBSP_BT_HOST_WAKE_PIN, &CYBSP_BT_HOST_WAKE_config);
844+
Cy_GPIO_Pin_Init(CYBSP_BT_DEVICE_WAKE_PORT, CYBSP_BT_DEVICE_WAKE_PIN, &CYBSP_BT_DEVICE_WAKE_config);
845845
#if defined (CY_USING_HAL)
846-
cyhal_hwmgr_reserve(&CYBSP_BT_HOST_WAKE_obj);
846+
cyhal_hwmgr_reserve(&CYBSP_BT_DEVICE_WAKE_obj);
847847
#endif //defined (CY_USING_HAL)
848848

849-
Cy_GPIO_Pin_Init(CYBSP_BT_DEVICE_WAKE_PORT, CYBSP_BT_DEVICE_WAKE_PIN, &CYBSP_BT_DEVICE_WAKE_config);
849+
Cy_GPIO_Pin_Init(CYBSP_BT_HOST_WAKE_PORT, CYBSP_BT_HOST_WAKE_PIN, &CYBSP_BT_HOST_WAKE_config);
850850
#if defined (CY_USING_HAL)
851-
cyhal_hwmgr_reserve(&CYBSP_BT_DEVICE_WAKE_obj);
851+
cyhal_hwmgr_reserve(&CYBSP_BT_HOST_WAKE_obj);
852852
#endif //defined (CY_USING_HAL)
853853

854854
Cy_GPIO_Pin_Init(CYBSP_EZI2C_SCL_PORT, CYBSP_EZI2C_SCL_PIN, &CYBSP_EZI2C_SCL_config);

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.h

Lines changed: 30 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -372,53 +372,53 @@ extern "C" {
372372
#if defined (CY_USING_HAL)
373373
#define CYBSP_BT_POWER_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_OPENDRAINDRIVESHIGH
374374
#endif //defined (CY_USING_HAL)
375-
#define CYBSP_BT_HOST_WAKE_ENABLED 1U
376-
#define CYBSP_BT_HOST_WAKE_PORT GPIO_PRT3
377-
#define CYBSP_BT_HOST_WAKE_PORT_NUM 3U
378-
#define CYBSP_BT_HOST_WAKE_PIN 5U
379-
#define CYBSP_BT_HOST_WAKE_NUM 5U
380-
#define CYBSP_BT_HOST_WAKE_DRIVEMODE CY_GPIO_DM_ANALOG
381-
#define CYBSP_BT_HOST_WAKE_INIT_DRIVESTATE 0
375+
#define CYBSP_BT_DEVICE_WAKE_ENABLED 1U
376+
#define CYBSP_BT_DEVICE_WAKE_PORT GPIO_PRT3
377+
#define CYBSP_BT_DEVICE_WAKE_PORT_NUM 3U
378+
#define CYBSP_BT_DEVICE_WAKE_PIN 5U
379+
#define CYBSP_BT_DEVICE_WAKE_NUM 5U
380+
#define CYBSP_BT_DEVICE_WAKE_DRIVEMODE CY_GPIO_DM_STRONG_IN_OFF
381+
#define CYBSP_BT_DEVICE_WAKE_INIT_DRIVESTATE 0
382382
#ifndef ioss_0_port_3_pin_5_HSIOM
383383
#define ioss_0_port_3_pin_5_HSIOM HSIOM_SEL_GPIO
384384
#endif
385-
#define CYBSP_BT_HOST_WAKE_HSIOM ioss_0_port_3_pin_5_HSIOM
386-
#define CYBSP_BT_HOST_WAKE_IRQ ioss_interrupts_gpio_3_IRQn
385+
#define CYBSP_BT_DEVICE_WAKE_HSIOM ioss_0_port_3_pin_5_HSIOM
386+
#define CYBSP_BT_DEVICE_WAKE_IRQ ioss_interrupts_gpio_3_IRQn
387387
#if defined (CY_USING_HAL)
388-
#define CYBSP_BT_HOST_WAKE_HAL_PORT_PIN P3_5
388+
#define CYBSP_BT_DEVICE_WAKE_HAL_PORT_PIN P3_5
389389
#endif //defined (CY_USING_HAL)
390390
#if defined (CY_USING_HAL)
391-
#define CYBSP_BT_HOST_WAKE_HAL_IRQ CYHAL_GPIO_IRQ_NONE
391+
#define CYBSP_BT_DEVICE_WAKE_HAL_IRQ CYHAL_GPIO_IRQ_NONE
392392
#endif //defined (CY_USING_HAL)
393393
#if defined (CY_USING_HAL)
394-
#define CYBSP_BT_HOST_WAKE_HAL_DIR CYHAL_GPIO_DIR_INPUT
394+
#define CYBSP_BT_DEVICE_WAKE_HAL_DIR CYHAL_GPIO_DIR_OUTPUT
395395
#endif //defined (CY_USING_HAL)
396396
#if defined (CY_USING_HAL)
397-
#define CYBSP_BT_HOST_WAKE_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
397+
#define CYBSP_BT_DEVICE_WAKE_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_STRONG
398398
#endif //defined (CY_USING_HAL)
399-
#define CYBSP_BT_DEVICE_WAKE_ENABLED 1U
400-
#define CYBSP_BT_DEVICE_WAKE_PORT GPIO_PRT4
401-
#define CYBSP_BT_DEVICE_WAKE_PORT_NUM 4U
402-
#define CYBSP_BT_DEVICE_WAKE_PIN 0U
403-
#define CYBSP_BT_DEVICE_WAKE_NUM 0U
404-
#define CYBSP_BT_DEVICE_WAKE_DRIVEMODE CY_GPIO_DM_STRONG_IN_OFF
405-
#define CYBSP_BT_DEVICE_WAKE_INIT_DRIVESTATE 0
399+
#define CYBSP_BT_HOST_WAKE_ENABLED 1U
400+
#define CYBSP_BT_HOST_WAKE_PORT GPIO_PRT4
401+
#define CYBSP_BT_HOST_WAKE_PORT_NUM 4U
402+
#define CYBSP_BT_HOST_WAKE_PIN 0U
403+
#define CYBSP_BT_HOST_WAKE_NUM 0U
404+
#define CYBSP_BT_HOST_WAKE_DRIVEMODE CY_GPIO_DM_ANALOG
405+
#define CYBSP_BT_HOST_WAKE_INIT_DRIVESTATE 0
406406
#ifndef ioss_0_port_4_pin_0_HSIOM
407407
#define ioss_0_port_4_pin_0_HSIOM HSIOM_SEL_GPIO
408408
#endif
409-
#define CYBSP_BT_DEVICE_WAKE_HSIOM ioss_0_port_4_pin_0_HSIOM
410-
#define CYBSP_BT_DEVICE_WAKE_IRQ ioss_interrupts_gpio_4_IRQn
409+
#define CYBSP_BT_HOST_WAKE_HSIOM ioss_0_port_4_pin_0_HSIOM
410+
#define CYBSP_BT_HOST_WAKE_IRQ ioss_interrupts_gpio_4_IRQn
411411
#if defined (CY_USING_HAL)
412-
#define CYBSP_BT_DEVICE_WAKE_HAL_PORT_PIN P4_0
412+
#define CYBSP_BT_HOST_WAKE_HAL_PORT_PIN P4_0
413413
#endif //defined (CY_USING_HAL)
414414
#if defined (CY_USING_HAL)
415-
#define CYBSP_BT_DEVICE_WAKE_HAL_IRQ CYHAL_GPIO_IRQ_NONE
415+
#define CYBSP_BT_HOST_WAKE_HAL_IRQ CYHAL_GPIO_IRQ_NONE
416416
#endif //defined (CY_USING_HAL)
417417
#if defined (CY_USING_HAL)
418-
#define CYBSP_BT_DEVICE_WAKE_HAL_DIR CYHAL_GPIO_DIR_OUTPUT
418+
#define CYBSP_BT_HOST_WAKE_HAL_DIR CYHAL_GPIO_DIR_INPUT
419419
#endif //defined (CY_USING_HAL)
420420
#if defined (CY_USING_HAL)
421-
#define CYBSP_BT_DEVICE_WAKE_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_STRONG
421+
#define CYBSP_BT_HOST_WAKE_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
422422
#endif //defined (CY_USING_HAL)
423423
#define CYBSP_EZI2C_SCL_ENABLED 1U
424424
#define CYBSP_EZI2C_SCL_PORT GPIO_PRT6
@@ -837,14 +837,14 @@ extern const cy_stc_gpio_pin_config_t CYBSP_BT_POWER_config;
837837
#if defined (CY_USING_HAL)
838838
extern const cyhal_resource_inst_t CYBSP_BT_POWER_obj;
839839
#endif //defined (CY_USING_HAL)
840-
extern const cy_stc_gpio_pin_config_t CYBSP_BT_HOST_WAKE_config;
841-
#if defined (CY_USING_HAL)
842-
extern const cyhal_resource_inst_t CYBSP_BT_HOST_WAKE_obj;
843-
#endif //defined (CY_USING_HAL)
844840
extern const cy_stc_gpio_pin_config_t CYBSP_BT_DEVICE_WAKE_config;
845841
#if defined (CY_USING_HAL)
846842
extern const cyhal_resource_inst_t CYBSP_BT_DEVICE_WAKE_obj;
847843
#endif //defined (CY_USING_HAL)
844+
extern const cy_stc_gpio_pin_config_t CYBSP_BT_HOST_WAKE_config;
845+
#if defined (CY_USING_HAL)
846+
extern const cyhal_resource_inst_t CYBSP_BT_HOST_WAKE_obj;
847+
#endif //defined (CY_USING_HAL)
848848
extern const cy_stc_gpio_pin_config_t CYBSP_EZI2C_SCL_config;
849849
#if defined (CY_USING_HAL)
850850
extern const cyhal_resource_inst_t CYBSP_EZI2C_SCL_obj;

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_routing.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,7 @@ void init_cycfg_routing(void);
4040
#define ioss_0_port_11_pin_5_HSIOM P11_5_SMIF_SPI_DATA1
4141
#define ioss_0_port_11_pin_6_HSIOM P11_6_SMIF_SPI_DATA0
4242
#define ioss_0_port_11_pin_7_HSIOM P11_7_SMIF_SPI_CLK
43-
#define ioss_0_port_1_pin_0_HSIOM HSIOM_SEL_AMUXA
43+
#define ioss_0_port_1_pin_0_HSIOM HSIOM_SEL_AMUXB
4444
#define ioss_0_port_3_pin_0_HSIOM P3_0_SCB2_UART_RX
4545
#define ioss_0_port_3_pin_1_HSIOM P3_1_SCB2_UART_TX
4646
#define ioss_0_port_3_pin_2_HSIOM P3_2_SCB2_UART_RTS
@@ -53,9 +53,9 @@ void init_cycfg_routing(void);
5353
#define ioss_0_port_7_pin_1_HSIOM HSIOM_SEL_AMUXA
5454
#define ioss_0_port_7_pin_2_HSIOM HSIOM_SEL_AMUXA
5555
#define ioss_0_port_7_pin_7_HSIOM HSIOM_SEL_AMUXA
56-
#define ioss_0_port_8_pin_1_HSIOM HSIOM_SEL_AMUXA
57-
#define ioss_0_port_8_pin_2_HSIOM HSIOM_SEL_AMUXB
58-
#define ioss_0_port_8_pin_3_HSIOM HSIOM_SEL_AMUXB
56+
#define ioss_0_port_8_pin_1_HSIOM HSIOM_SEL_AMUXB
57+
#define ioss_0_port_8_pin_2_HSIOM HSIOM_SEL_AMUXA
58+
#define ioss_0_port_8_pin_3_HSIOM HSIOM_SEL_AMUXA
5959
#define ioss_0_port_8_pin_4_HSIOM HSIOM_SEL_AMUXA
6060
#define ioss_0_port_8_pin_5_HSIOM HSIOM_SEL_AMUXA
6161
#define ioss_0_port_8_pin_6_HSIOM HSIOM_SEL_AMUXB

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/COMPONENT_BSP_DESIGN_MODUS/design.modus

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
<?xml version="1.0" encoding="UTF-8"?>
2-
<Design version="11" xmlns="http://cypress.com/xsd/cydesignfile_v2">
2+
<Design version="11" device_library_hint_path="../../psoc6pdl/devicesupport.xml" xmlns="http://cypress.com/xsd/cydesignfile_v2">
33
<ToolInfo version="1.0.0"/>
44
<Devices>
55
<Device mpn="CY8C624ABZI-D44">
@@ -184,8 +184,8 @@
184184
<Param id="sioOutputBuffer" value="true"/>
185185
<Param id="inFlash" value="true"/>
186186
</Block>
187-
<Block location="ioss[0].port[3].pin[5]" alias="CYBSP_BT_HOST_WAKE" template="mxs40pin" version="1.1">
188-
<Param id="DriveModes" value="CY_GPIO_DM_ANALOG"/>
187+
<Block location="ioss[0].port[3].pin[5]" alias="CYBSP_BT_DEVICE_WAKE" template="mxs40pin" version="1.1">
188+
<Param id="DriveModes" value="CY_GPIO_DM_STRONG_IN_OFF"/>
189189
<Param id="initialState" value="0"/>
190190
<Param id="vtrip" value="CY_GPIO_VTRIP_CMOS"/>
191191
<Param id="isrTrigger" value="CY_GPIO_INTR_DISABLE"/>
@@ -194,8 +194,8 @@
194194
<Param id="sioOutputBuffer" value="true"/>
195195
<Param id="inFlash" value="true"/>
196196
</Block>
197-
<Block location="ioss[0].port[4].pin[0]" alias="CYBSP_BT_DEVICE_WAKE" template="mxs40pin" version="1.1">
198-
<Param id="DriveModes" value="CY_GPIO_DM_STRONG_IN_OFF"/>
197+
<Block location="ioss[0].port[4].pin[0]" alias="CYBSP_BT_HOST_WAKE" template="mxs40pin" version="1.1">
198+
<Param id="DriveModes" value="CY_GPIO_DM_ANALOG"/>
199199
<Param id="initialState" value="0"/>
200200
<Param id="vtrip" value="CY_GPIO_VTRIP_CMOS"/>
201201
<Param id="isrTrigger" value="CY_GPIO_INTR_DISABLE"/>

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c

Lines changed: 45 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -72,6 +72,30 @@ const cy_stc_gpio_pin_config_t CYBSP_WCO_OUT_config =
7272
.channel_num = CYBSP_WCO_OUT_PIN,
7373
};
7474
#endif //defined (CY_USING_HAL)
75+
const cy_stc_gpio_pin_config_t CYBSP_WIFI_HOST_WAKE_config =
76+
{
77+
.outVal = 0,
78+
.driveMode = CY_GPIO_DM_ANALOG,
79+
.hsiom = CYBSP_WIFI_HOST_WAKE_HSIOM,
80+
.intEdge = CY_GPIO_INTR_DISABLE,
81+
.intMask = 0UL,
82+
.vtrip = CY_GPIO_VTRIP_CMOS,
83+
.slewRate = CY_GPIO_SLEW_FAST,
84+
.driveSel = CY_GPIO_DRIVE_1_2,
85+
.vregEn = 0UL,
86+
.ibufMode = 0UL,
87+
.vtripSel = 0UL,
88+
.vrefSel = 0UL,
89+
.vohSel = 0UL,
90+
};
91+
#if defined (CY_USING_HAL)
92+
const cyhal_resource_inst_t CYBSP_WIFI_HOST_WAKE_obj =
93+
{
94+
.type = CYHAL_RSC_GPIO,
95+
.block_num = CYBSP_WIFI_HOST_WAKE_PORT_NUM,
96+
.channel_num = CYBSP_WIFI_HOST_WAKE_PIN,
97+
};
98+
#endif //defined (CY_USING_HAL)
7599
const cy_stc_gpio_pin_config_t CYBSP_QSPI_SS_config =
76100
{
77101
.outVal = 1,
@@ -360,11 +384,11 @@ const cy_stc_gpio_pin_config_t CYBSP_BT_POWER_config =
360384
.channel_num = CYBSP_BT_POWER_PIN,
361385
};
362386
#endif //defined (CY_USING_HAL)
363-
const cy_stc_gpio_pin_config_t CYBSP_BT_HOST_WAKE_config =
387+
const cy_stc_gpio_pin_config_t CYBSP_BT_DEVICE_WAKE_config =
364388
{
365389
.outVal = 0,
366-
.driveMode = CY_GPIO_DM_ANALOG,
367-
.hsiom = CYBSP_BT_HOST_WAKE_HSIOM,
390+
.driveMode = CY_GPIO_DM_STRONG_IN_OFF,
391+
.hsiom = CYBSP_BT_DEVICE_WAKE_HSIOM,
368392
.intEdge = CY_GPIO_INTR_DISABLE,
369393
.intMask = 0UL,
370394
.vtrip = CY_GPIO_VTRIP_CMOS,
@@ -377,18 +401,18 @@ const cy_stc_gpio_pin_config_t CYBSP_BT_HOST_WAKE_config =
377401
.vohSel = 0UL,
378402
};
379403
#if defined (CY_USING_HAL)
380-
const cyhal_resource_inst_t CYBSP_BT_HOST_WAKE_obj =
404+
const cyhal_resource_inst_t CYBSP_BT_DEVICE_WAKE_obj =
381405
{
382406
.type = CYHAL_RSC_GPIO,
383-
.block_num = CYBSP_BT_HOST_WAKE_PORT_NUM,
384-
.channel_num = CYBSP_BT_HOST_WAKE_PIN,
407+
.block_num = CYBSP_BT_DEVICE_WAKE_PORT_NUM,
408+
.channel_num = CYBSP_BT_DEVICE_WAKE_PIN,
385409
};
386410
#endif //defined (CY_USING_HAL)
387-
const cy_stc_gpio_pin_config_t CYBSP_BT_DEVICE_WAKE_config =
411+
const cy_stc_gpio_pin_config_t CYBSP_BT_HOST_WAKE_config =
388412
{
389413
.outVal = 0,
390-
.driveMode = CY_GPIO_DM_STRONG_IN_OFF,
391-
.hsiom = CYBSP_BT_DEVICE_WAKE_HSIOM,
414+
.driveMode = CY_GPIO_DM_ANALOG,
415+
.hsiom = CYBSP_BT_HOST_WAKE_HSIOM,
392416
.intEdge = CY_GPIO_INTR_DISABLE,
393417
.intMask = 0UL,
394418
.vtrip = CY_GPIO_VTRIP_CMOS,
@@ -401,11 +425,11 @@ const cy_stc_gpio_pin_config_t CYBSP_BT_DEVICE_WAKE_config =
401425
.vohSel = 0UL,
402426
};
403427
#if defined (CY_USING_HAL)
404-
const cyhal_resource_inst_t CYBSP_BT_DEVICE_WAKE_obj =
428+
const cyhal_resource_inst_t CYBSP_BT_HOST_WAKE_obj =
405429
{
406430
.type = CYHAL_RSC_GPIO,
407-
.block_num = CYBSP_BT_DEVICE_WAKE_PORT_NUM,
408-
.channel_num = CYBSP_BT_DEVICE_WAKE_PIN,
431+
.block_num = CYBSP_BT_HOST_WAKE_PORT_NUM,
432+
.channel_num = CYBSP_BT_HOST_WAKE_PIN,
409433
};
410434
#endif //defined (CY_USING_HAL)
411435
const cy_stc_gpio_pin_config_t CYBSP_EZI2C_SCL_config =
@@ -782,6 +806,11 @@ void init_cycfg_pins(void)
782806
cyhal_hwmgr_reserve(&CYBSP_WCO_OUT_obj);
783807
#endif //defined (CY_USING_HAL)
784808

809+
Cy_GPIO_Pin_Init(CYBSP_WIFI_HOST_WAKE_PORT, CYBSP_WIFI_HOST_WAKE_PIN, &CYBSP_WIFI_HOST_WAKE_config);
810+
#if defined (CY_USING_HAL)
811+
cyhal_hwmgr_reserve(&CYBSP_WIFI_HOST_WAKE_obj);
812+
#endif //defined (CY_USING_HAL)
813+
785814
Cy_GPIO_Pin_Init(CYBSP_QSPI_SS_PORT, CYBSP_QSPI_SS_PIN, &CYBSP_QSPI_SS_config);
786815
#if defined (CY_USING_HAL)
787816
cyhal_hwmgr_reserve(&CYBSP_QSPI_SS_obj);
@@ -841,14 +870,14 @@ void init_cycfg_pins(void)
841870
cyhal_hwmgr_reserve(&CYBSP_BT_POWER_obj);
842871
#endif //defined (CY_USING_HAL)
843872

844-
Cy_GPIO_Pin_Init(CYBSP_BT_HOST_WAKE_PORT, CYBSP_BT_HOST_WAKE_PIN, &CYBSP_BT_HOST_WAKE_config);
873+
Cy_GPIO_Pin_Init(CYBSP_BT_DEVICE_WAKE_PORT, CYBSP_BT_DEVICE_WAKE_PIN, &CYBSP_BT_DEVICE_WAKE_config);
845874
#if defined (CY_USING_HAL)
846-
cyhal_hwmgr_reserve(&CYBSP_BT_HOST_WAKE_obj);
875+
cyhal_hwmgr_reserve(&CYBSP_BT_DEVICE_WAKE_obj);
847876
#endif //defined (CY_USING_HAL)
848877

849-
Cy_GPIO_Pin_Init(CYBSP_BT_DEVICE_WAKE_PORT, CYBSP_BT_DEVICE_WAKE_PIN, &CYBSP_BT_DEVICE_WAKE_config);
878+
Cy_GPIO_Pin_Init(CYBSP_BT_HOST_WAKE_PORT, CYBSP_BT_HOST_WAKE_PIN, &CYBSP_BT_HOST_WAKE_config);
850879
#if defined (CY_USING_HAL)
851-
cyhal_hwmgr_reserve(&CYBSP_BT_DEVICE_WAKE_obj);
880+
cyhal_hwmgr_reserve(&CYBSP_BT_HOST_WAKE_obj);
852881
#endif //defined (CY_USING_HAL)
853882

854883
Cy_GPIO_Pin_Init(CYBSP_EZI2C_SCL_PORT, CYBSP_EZI2C_SCL_PIN, &CYBSP_EZI2C_SCL_config);

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