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#error [NOT_SUPPORTED] SPI not supported for this target
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#elif !COMPONENT_FPGA_CI_TEST_SHIELD
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#error [NOT_SUPPORTED] FPGA CI Test Shield is needed to run this test
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+ #elif !defined(TARGET_FF_ARDUINO) && !defined(MBED_CONF_TARGET_DEFAULT_FORM_FACTOR)
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+ #error [NOT_SUPPORTED] Test not supported for this form factor
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#else
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#include " utest/utest.h"
@@ -32,23 +34,45 @@ using namespace utest::v1;
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#include " pinmap.h"
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#include " test_utils.h"
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+ typedef enum {
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+ TRANSFER_SPI_MASTER_WRITE_SYNC,
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+ TRANSFER_SPI_MASTER_BLOCK_WRITE_SYNC,
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+ TRANSFER_SPI_MASTER_TRANSFER_ASYNC
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+ } transfer_type_t ;
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+
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+ #define FREQ_500_KHZ 500000
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+ #define FREQ_1_MHZ 1000000
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+ #define FREQ_2_MHZ 2000000
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const int TRANSFER_COUNT = 300 ;
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SPIMasterTester tester (DefaultFormFactor::pins(), DefaultFormFactor::restricted_pins());
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+ spi_t spi;
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+ static volatile bool async_trasfer_done;
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+
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+ #if DEVICE_SPI_ASYNCH
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+ void spi_async_handler ()
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+ {
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+ int event = spi_irq_handler_asynch (&spi);
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+
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+ if (event == SPI_EVENT_COMPLETE) {
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+ async_trasfer_done = true ;
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+ }
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+ }
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+ #endif
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void spi_test_init_free (PinName mosi, PinName miso, PinName sclk, PinName ssel)
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{
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- spi_t spi;
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spi_init (&spi, mosi, miso, sclk, ssel);
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spi_format (&spi, 8 , SPITester::Mode0, 0 );
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spi_frequency (&spi, 1000000 );
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spi_free (&spi);
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}
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- void spi_test_common (PinName mosi, PinName miso, PinName sclk, PinName ssel, SPITester::SpiMode spi_mode, uint32_t sym_size)
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+ void spi_test_common (PinName mosi, PinName miso, PinName sclk, PinName ssel, SPITester::SpiMode spi_mode, uint32_t sym_size, transfer_type_t transfer_type, uint32_t frequency )
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{
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uint32_t sym_mask = ((1 << sym_size) - 1 );
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+
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// Remap pins for test
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tester.reset ();
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tester.pin_map_set (mosi, MbedTester::LogicalPinSPIMosi);
@@ -57,10 +81,10 @@ void spi_test_common(PinName mosi, PinName miso, PinName sclk, PinName ssel, SPI
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tester.pin_map_set (ssel, MbedTester::LogicalPinSPISsel);
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// Initialize mbed SPI pins
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- spi_t spi;
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+
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spi_init (&spi, mosi, miso, sclk, ssel);
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spi_format (&spi, sym_size, spi_mode, 0 );
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- spi_frequency (&spi, 1000000 );
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+ spi_frequency (&spi, frequency );
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// Configure spi_slave module
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tester.set_mode (spi_mode);
@@ -71,13 +95,61 @@ void spi_test_common(PinName mosi, PinName miso, PinName sclk, PinName ssel, SPI
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tester.peripherals_reset ();
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tester.select_peripheral (SPITester::PeripheralSPI);
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- // Send and receive test data
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uint32_t checksum = 0 ;
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- for (int i = 0 ; i < TRANSFER_COUNT; i++) {
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- uint32_t data = spi_master_write (&spi, (0 - i) & sym_mask);
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- TEST_ASSERT_EQUAL (i & sym_mask, data);
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+ int result = 0 ;
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+ uint8_t tx_buf[TRANSFER_COUNT] = {0 };
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+ uint8_t rx_buf[TRANSFER_COUNT] = {0 };
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+
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+ // Send and receive test data
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+ switch (transfer_type) {
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+ case TRANSFER_SPI_MASTER_WRITE_SYNC:
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+ for (int i = 0 ; i < TRANSFER_COUNT; i++) {
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+ uint32_t data = spi_master_write (&spi, (0 - i) & sym_mask);
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+ TEST_ASSERT_EQUAL (i & sym_mask, data);
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+
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+ checksum += (0 - i) & sym_mask;
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+ }
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+ break ;
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+
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+ case TRANSFER_SPI_MASTER_BLOCK_WRITE_SYNC:
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+ for (int i = 0 ; i < TRANSFER_COUNT; i++) {
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+ tx_buf[i] = (0 - i) & sym_mask;
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+ checksum += (0 - i) & sym_mask;
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+ rx_buf[i] = 0xAA ;
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+ }
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+
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+ result = spi_master_block_write (&spi, (const char *)tx_buf, TRANSFER_COUNT, (char *)rx_buf, TRANSFER_COUNT, 0xF5 );
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+
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+ for (int i = 0 ; i < TRANSFER_COUNT; i++) {
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+ TEST_ASSERT_EQUAL (i & sym_mask, rx_buf[i]);
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+ }
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+ TEST_ASSERT_EQUAL (TRANSFER_COUNT, result);
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+ break ;
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+
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+ #if DEVICE_SPI_ASYNCH
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+ case TRANSFER_SPI_MASTER_TRANSFER_ASYNC:
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+ for (int i = 0 ; i < TRANSFER_COUNT; i++) {
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+ tx_buf[i] = (0 - i) & sym_mask;
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+ checksum += (0 - i) & sym_mask;
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+ rx_buf[i] = 0xAA ;
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+ }
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+
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+ async_trasfer_done = false ;
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+
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+ spi_master_transfer (&spi, tx_buf, TRANSFER_COUNT, rx_buf, TRANSFER_COUNT, 8 , (uint32_t )spi_async_handler, 0 , DMA_USAGE_NEVER);
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+ while (!async_trasfer_done);
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+
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+ for (int i = 0 ; i < TRANSFER_COUNT; i++) {
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+ TEST_ASSERT_EQUAL (i & sym_mask, rx_buf[i]);
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+ }
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+
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+ break ;
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+ #endif
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+
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+ default :
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+ TEST_ASSERT_MESSAGE (0 , " Unsupported transfer type." );
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+ break ;
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- checksum += (0 - i) & sym_mask;
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}
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// Verify that the transfer was successful
@@ -88,27 +160,36 @@ void spi_test_common(PinName mosi, PinName miso, PinName sclk, PinName ssel, SPI
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tester.reset ();
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}
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- template <SPITester::SpiMode spi_mode, uint32_t sym_size>
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+ template <SPITester::SpiMode spi_mode, uint32_t sym_size, transfer_type_t transfer_type, uint32_t frequency >
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void spi_test_common (PinName mosi, PinName miso, PinName sclk, PinName ssel)
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{
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- spi_test_common (mosi, miso, sclk, ssel, spi_mode, sym_size);
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+ spi_test_common (mosi, miso, sclk, ssel, spi_mode, sym_size, transfer_type, frequency );
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}
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Case cases[] = {
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// This will be run for all pins
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Case (" SPI - init/free test all pins" , all_ports<SPIPort, DefaultFormFactor, spi_test_init_free>),
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// This will be run for all peripherals
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- Case (" SPI - basic test" , all_peripherals<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode0, 8 > >),
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+ Case (" SPI - basic test" , all_peripherals<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode0, 8 , TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ > >),
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// This will be run for single pin configuration
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- Case (" SPI - mode testing (MODE_1)" , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode1, 8 > >),
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- Case (" SPI - mode testing (MODE_2)" , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode2, 8 > >),
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- Case (" SPI - mode testing (MODE_3)" , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode3, 8 > >),
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+ Case (" SPI - mode testing (MODE_1)" , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode1, 8 , TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ> >),
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+ Case (" SPI - mode testing (MODE_2)" , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode2, 8 , TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ> >),
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+ Case (" SPI - mode testing (MODE_3)" , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode3, 8 , TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ> >),
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+
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+ Case (" SPI - symbol size testing (4)" , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode0, 4 , TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ> >),
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+ Case (" SPI - symbol size testing (12)" , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode0, 12 , TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ> >),
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+ Case (" SPI - symbol size testing (16)" , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode0, 16 , TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ> >),
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+
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+ Case (" SPI - frequency testing (500 kHz)" , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode0, 8 , TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_500_KHZ> >),
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+ Case (" SPI - frequency testing (2 MHz)" , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode0, 8 , TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_2_MHZ> >),
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+
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+ Case (" SPI - block write" , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode0, 8 , TRANSFER_SPI_MASTER_BLOCK_WRITE_SYNC, FREQ_1_MHZ> >),
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- Case ( " SPI - symbol size testing (4) " , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode0, 4 > >),
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- Case (" SPI - symbol size testing (12) " , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode0, 12 > >),
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- Case ( " SPI - symbol size testing (16) " , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode0, 16 > >)
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+ # if DEVICE_SPI_ASYNCH
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+ Case (" SPI - async mode " , one_peripheral<SPIPort, DefaultFormFactor, spi_test_common<SPITester::Mode0, 8 , TRANSFER_SPI_MASTER_TRANSFER_ASYNC, FREQ_1_MHZ > >)
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+ # endif
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};
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utest::v1::status_t greentea_test_setup (const size_t number_of_cases)
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