Add SPIF_ULBPR command also to QSPIFBlockDevice and SPIFReducedBlockDevice

Author: DBS06

components/storage/blockdevice/COMPONENT_QSPIF/QSPIFBlockDevice.cpp

@@ -95,6 +95,7 @@ enum qspif_default_instructions {
     QSPIF_RSTEN = 0x66, // Reset Enable
     QSPIF_RST = 0x99, // Reset
     QSPIF_RDID = 0x9f, // Read Manufacturer and JDEC Device ID
+    QSPIF_ULBPR = 0x98, // Clears all write-protection bits in the Block-Protection register
 };
 
 // Local Function
@@ -206,7 +207,7 @@ int QSPIFBlockDevice::init()
             // SST devices come preset with block protection
             // enabled for some regions, issue write disable instruction to clear
             _set_write_enable();
-            _qspi_send_general_command(QSPIF_WRDI, QSPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0);
+            _qspi_send_general_command(QSPIF_ULBPR, QSPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0);
             break;
     }
 

components/storage/blockdevice/COMPONENT_RSPIF/SPIFReducedBlockDevice.cpp

@@ -40,6 +40,7 @@ enum ops {
     SPIF_WRDI = 0x04, // Write Disable
     SPIF_RDSR = 0x05, // Read Status Register
     SPIF_RDID = 0x9f, // Read Manufacturer and JDEC Device ID
+    SPIF_ULBPR = 0x98, // Clears all write-protection bits in the Block-Protection register
 };
 
 // Status register from RDSR
@@ -68,7 +69,7 @@ int SPIFReducedBlockDevice::init()
             // SST devices come preset with block protection
             // enabled for some regions, issue gbpu instruction to clear
             _wren();
-            _cmdwrite(0x98, 0, 0, 0x0, NULL);
+            _cmdwrite(SPIF_ULBPR, 0, 0, 0x0, NULL);
             break;
     }