Skip to content

Commit 1e163e8

Browse files
cyliangtwcyliangtw
committed
[NUC472/M453] Support bootloader
1 parent d554f6e commit 1e163e8

File tree

14 files changed

+141
-37
lines changed

14 files changed

+141
-37
lines changed

‎targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_MICRO/M453.sct

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,15 @@
1+
#! armcc -E
12

2-
LR_IROM1 0x00000000 {
3-
ER_IROM1 0x00000000 { ; load address = execution address
3+
#if !defined(MBED_APP_START)
4+
#define MBED_APP_START 0x00000000
5+
#endif
6+
7+
#if !defined(MBED_APP_SIZE)
8+
#define MBED_APP_SIZE 0x00040000
9+
#endif
10+
11+
LR_IROM1 MBED_APP_START {
12+
ER_IROM1 MBED_APP_START { ; load address = execution address
413
*(RESET, +First)
514
*(InRoot$$Sections)
615
.ANY (+RO)
@@ -23,6 +32,6 @@ LR_IROM1 0x00000000 {
2332
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x8000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
2433
}
2534
}
26-
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00040000) ; 256 KB APROM
35+
ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 256 KB APROM
2736
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20008000) ; 32 KB SRAM
2837

‎targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_STD/M453.sct

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,15 @@
1+
#! armcc -E
12

2-
LR_IROM1 0x00000000 {
3-
ER_IROM1 0x00000000 { ; load address = execution address
3+
#if !defined(MBED_APP_START)
4+
#define MBED_APP_START 0x00000000
5+
#endif
6+
7+
#if !defined(MBED_APP_SIZE)
8+
#define MBED_APP_SIZE 0x00040000
9+
#endif
10+
11+
LR_IROM1 MBED_APP_START {
12+
ER_IROM1 MBED_APP_START { ; load address = execution address
413
*(RESET, +First)
514
*(InRoot$$Sections)
615
.ANY (+RO)
@@ -23,6 +32,6 @@ LR_IROM1 0x00000000 {
2332
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x8000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
2433
}
2534
}
26-
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00040000) ; 256 KB APROM
35+
ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 256 KB APROM
2736
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20008000) ; 32 KB SRAM
2837

‎targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,12 +2,20 @@
22
* Nuvoton M453 GCC linker script file
33
*/
44

5+
#if !defined(MBED_APP_START)
6+
#define MBED_APP_START 0x00000000
7+
#endif
8+
9+
#if !defined(MBED_APP_SIZE)
10+
#define MBED_APP_SIZE 0x00040000
11+
#endif
12+
513
StackSize = 0x800;
614

715
MEMORY
816
{
9-
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
10-
FLASH (rx) : ORIGIN = 0x00000400, LENGTH = 0x00040000 - 0x00000400
17+
VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x00000400
18+
FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = MBED_APP_SIZE - 0x00000400
1119
RAM_INTERN (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 - 0x00000000
1220
}
1321

‎targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,13 @@
11
/*###ICF### Section handled by ICF editor, don't touch! ****/
22
/*-Editor annotation file-*/
33
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4+
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; }
5+
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00040000; }
46
/*-Specials-*/
5-
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
7+
define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
68
/*-Memory Regions-*/
7-
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
8-
define symbol __ICFEDIT_region_ROM_end__ = 0x00040000;
9+
define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
10+
define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
911
define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000;
1012
define symbol __ICFEDIT_region_IRAM_end__ = 0x20008000;
1113
/*-Sizes-*/

‎targets/TARGET_NUVOTON/TARGET_M451/device/cmsis_nvic.h

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,8 +32,18 @@
3232
# define NVIC_RAM_VECTOR_ADDRESS ((uint32_t) &__start_vector_table__)
3333
#endif
3434

35-
36-
#define NVIC_FLASH_VECTOR_ADDRESS 0
35+
#if defined(__CC_ARM)
36+
extern uint32_t Load$$LR$$LR_IROM1$$Base[];
37+
#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)Load$$LR$$LR_IROM1$$Base)
38+
#elif defined(__ICCARM__)
39+
#pragma section=".intvec"
40+
#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)__section_begin(".intvec"))
41+
#elif defined(__GNUC__)
42+
extern uint32_t __vector_table;
43+
#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)&__vector_table)
44+
#else
45+
#error "Flash vector address not set for this toolchain"
46+
#endif
3747

3848
#ifdef __cplusplus
3949
extern "C" {

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,15 @@
1+
#! armcc -E
12

2-
LR_IROM1 0x00000000 {
3-
ER_IROM1 0x00000000 { ; load address = execution address
3+
#if !defined(MBED_APP_START)
4+
#define MBED_APP_START 0x00000000
5+
#endif
6+
7+
#if !defined(MBED_APP_SIZE)
8+
#define MBED_APP_SIZE 0x00080000
9+
#endif
10+
11+
LR_IROM1 MBED_APP_START {
12+
ER_IROM1 MBED_APP_START { ; load address = execution address
413
*(RESET, +First)
514
*(InRoot$$Sections)
615
.ANY (+RO)
@@ -29,7 +38,7 @@ LR_IROM1 0x00000000 {
2938
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x60000000 + 0x100000 - AlignExpr(ImageLimit(ER_XRAM1), 16)) {
3039
}
3140
}
32-
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00080000) ; 512 KB APROM
41+
ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 512 KB APROM
3342
ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal)
3443
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x60100000) ; 1 MB SRAM (external)
3544

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,15 @@
1+
#! armcc -E
12

2-
LR_IROM1 0x00000000 {
3-
ER_IROM1 0x00000000 { ; load address = execution address
3+
#if !defined(MBED_APP_START)
4+
#define MBED_APP_START 0x00000000
5+
#endif
6+
7+
#if !defined(MBED_APP_SIZE)
8+
#define MBED_APP_SIZE 0x00080000
9+
#endif
10+
11+
LR_IROM1 MBED_APP_START {
12+
ER_IROM1 MBED_APP_START { ; load address = execution address
413
*(RESET, +First)
514
*(InRoot$$Sections)
615
.ANY (+RO)
@@ -24,6 +33,6 @@ LR_IROM1 0x00000000 {
2433
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x10000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
2534
}
2635
}
27-
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00080000) ; 512 KB APROM
36+
ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 512 KB APROM
2837
ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal)
2938

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,15 @@
1+
#! armcc -E
12

2-
LR_IROM1 0x00000000 {
3-
ER_IROM1 0x00000000 { ; load address = execution address
3+
#if !defined(MBED_APP_START)
4+
#define MBED_APP_START 0x00000000
5+
#endif
6+
7+
#if !defined(MBED_APP_SIZE)
8+
#define MBED_APP_SIZE 0x00080000
9+
#endif
10+
11+
LR_IROM1 MBED_APP_START {
12+
ER_IROM1 MBED_APP_START { ; load address = execution address
413
*(RESET, +First)
514
*(InRoot$$Sections)
615
.ANY (+RO)
@@ -31,7 +40,7 @@ LR_IROM1 0x00000000 {
3140
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x60000000 + 0x100000 - AlignExpr(ImageLimit(ER_XRAM1), 16)) {
3241
}
3342
}
34-
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00080000) ; 512 KB APROM
43+
ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 512 KB APROM
3544
ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal)
3645
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x60100000) ; 1 MB SRAM (external)
3746

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,15 @@
1+
#! armcc -E
12

2-
LR_IROM1 0x00000000 {
3-
ER_IROM1 0x00000000 { ; load address = execution address
3+
#if !defined(MBED_APP_START)
4+
#define MBED_APP_START 0x00000000
5+
#endif
6+
7+
#if !defined(MBED_APP_SIZE)
8+
#define MBED_APP_SIZE 0x00080000
9+
#endif
10+
11+
LR_IROM1 MBED_APP_START {
12+
ER_IROM1 MBED_APP_START { ; load address = execution address
413
*(RESET, +First)
514
*(InRoot$$Sections)
615
.ANY (+RO)
@@ -24,6 +33,6 @@ LR_IROM1 0x00000000 {
2433
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x10000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
2534
}
2635
}
27-
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00080000) ; 512 KB APROM
36+
ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 512 KB APROM
2837
ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal)
2938

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_SUPPORTED/NUC472.ld

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,13 +2,21 @@
22
* Nuvoton NUC472 GCC linker script file
33
*/
44

5+
#if !defined(MBED_APP_START)
6+
#define MBED_APP_START 0x00000000
7+
#endif
8+
9+
#if !defined(MBED_APP_SIZE)
10+
#define MBED_APP_SIZE 0x00080000
11+
#endif
12+
513
StackSize = 0x800;
614

715
MEMORY
816
{
917

10-
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
11-
FLASH (rx) : ORIGIN = 0x00000400, LENGTH = 0x00080000 - 0x00000400
18+
VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x00000400
19+
FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = MBED_APP_SIZE - 0x00000400
1220
RAM_INTERN (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 - 0x00000000
1321
RAM_EXTERN (rwx) : ORIGIN = 0x60000000, LENGTH = 0x00100000
1422
}

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,13 +2,21 @@
22
* Nuvoton NUC472 GCC linker script file
33
*/
44

5+
#if !defined(MBED_APP_START)
6+
#define MBED_APP_START 0x00000000
7+
#endif
8+
9+
#if !defined(MBED_APP_SIZE)
10+
#define MBED_APP_SIZE 0x00080000
11+
#endif
12+
513
StackSize = 0x800;
614

715
MEMORY
816
{
917

10-
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
11-
FLASH (rx) : ORIGIN = 0x00000400, LENGTH = 0x00080000 - 0x00000400
18+
VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x00000400
19+
FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = MBED_APP_SIZE - 0x00000400
1220
RAM_INTERN (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 - 0x00000000
1321
}
1422

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,13 @@
11
/*###ICF### Section handled by ICF editor, don't touch! ****/
22
/*-Editor annotation file-*/
33
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4+
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; }
5+
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00080000; }
46
/*-Specials-*/
5-
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
7+
define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
68
/*-Memory Regions-*/
7-
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
8-
define symbol __ICFEDIT_region_ROM_end__ = 0x00080000;
9+
define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
10+
define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
911
define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000;
1012
define symbol __ICFEDIT_region_IRAM_end__ = 0x20010000;
1113
define symbol __ICFEDIT_region_XRAM_start__ = 0x60000000;

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,13 @@
11
/*###ICF### Section handled by ICF editor, don't touch! ****/
22
/*-Editor annotation file-*/
33
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4+
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; }
5+
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00080000; }
46
/*-Specials-*/
5-
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
7+
define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
68
/*-Memory Regions-*/
7-
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
8-
define symbol __ICFEDIT_region_ROM_end__ = 0x00080000;
9+
define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
10+
define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
911
define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000;
1012
define symbol __ICFEDIT_region_IRAM_end__ = 0x20010000;
1113
/*-Sizes-*/

‎targets/TARGET_NUVOTON/TARGET_NUC472/device/cmsis_nvic.h

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,8 +32,18 @@
3232
# define NVIC_RAM_VECTOR_ADDRESS ((uint32_t) &__start_vector_table__)
3333
#endif
3434

35-
36-
#define NVIC_FLASH_VECTOR_ADDRESS 0
35+
#if defined(__CC_ARM)
36+
extern uint32_t Load$$LR$$LR_IROM1$$Base[];
37+
#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)Load$$LR$$LR_IROM1$$Base)
38+
#elif defined(__ICCARM__)
39+
#pragma section=".intvec"
40+
#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)__section_begin(".intvec"))
41+
#elif defined(__GNUC__)
42+
extern uint32_t __vector_table;
43+
#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)&__vector_table)
44+
#else
45+
#error "Flash vector address not set for this toolchain"
46+
#endif
3747

3848
#ifdef __cplusplus
3949
extern "C" {

0 commit comments

Comments
 (0)