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Nir Sonnenschein
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Merge pull request #7976 from mprse/spi_feature_branch_test_ci
Add SPI basic test and test header file.
2 parents baf9d19 + 9a3e96d commit 1f5e523

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TESTS/mbed_hal/spi/main.cpp

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TESTS/mbed_hal/spi/spi_api_tests.h

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/* mbed Microcontroller Library
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* Copyright (c) 2018 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/** \addtogroup hal_spi_tests */
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/** @{*/
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#ifndef MBED_SPI_API_TESTS_H
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#define MBED_SPI_API_TESTS_H
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#include "device.h"
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#if DEVICE_SPI
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** Test that spi_get_module() returns the SPIName - unique identifier to the peripheral associated
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* to this SPI channel.
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*
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* Given is platform with SPI support.
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* When spi_get_module() is called with valid SPI pins.
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* Then function returns the SPIName - unique identifier to the peripheral associated
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* to this SPI channel.
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*
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* @note `mosi` or `miso` pin can be undefined (but not both). `mclk` must be defined.
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*/
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void test_get_module();
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/** Test that spi_get_capabilities() fills the given spi_capabilities_t instance with capabilities
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* of the specified SPI peripheral.
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*
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* Given is platform with SPI support.
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* When spi_get_capabilities() is called with the valid SPI name (and SS pin).
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* Then function fills the given spi_capabilities_t instance with capabilities
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* of the specified SPI peripheral.
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*
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* @note spi_get_capabilities() considers the `ssel` pin when evaluation the
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* support_slave_mode capability.
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*
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*/
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void test_get_capabilities();
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/** Test that spi_init() successfully initializes the pins and spi_free() can successfully
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* reset the pins to their default state.
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*
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* Given is platform with SPI support.
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* When spi_init() is called with the valid pins configuration and then spi_free() is called on
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* the created SPI object.
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* Then both operations are successfully performed.
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*
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*/
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void test_init_free();
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/** Test that spi_format() sets/updates the transmission format of the SPI peripheral.
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*
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* Given is platform with SPI support.
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* When spi_format() is called and valid format is specified.
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* Then function is executed successfully.
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*
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*/
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void test_set_format();
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/** Test that test_set_frequency() sets the frequency used during the SPI transfer.
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*
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* Given is platform with SPI support.
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* When test_set_frequency() is called and valid frequency is specified.
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* Then function is executed successfully and actual frequency which will be used during the transfer is returned.
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*
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* @note Frequency can be only set by SPI peripheral operating in master mode.
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* @note Frequency must be in range specified by the capabilities of the SPI peripheral.
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*
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*/
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void test_set_frequency();
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/** Test that spi_transfer() can successfully perform transfer in master mode
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* (TX/RX buffers are defined and have the same sizes) and returns the number of
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* symbols clocked on the bus during this transfer.
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*
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* Given is platform with SPI support.
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* When spi_transfer() is called for SPI peripheral operating in master mode and
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* both TX/RX buffers are specified and have equal sizes.
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* Then function is executed successfully and returns number of symbols clocked on the bus during this transfer.
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*
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*/
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void test_transfer_master();
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/** Test that spi_transfer() can successfully perform transfer in master mode
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* (TX/RX buffers are undefined or have different sizes) and returns the number of
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* symbols clocked on the bus during this transfer.
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*
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* Given is platform with SPI support.
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* When spi_transfer() is called for SPI peripheral operating in master mode and
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* TX/RX buffers are undefined or have different sizes.
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* Then function is executed successfully and returns number of symbols clocked on the bus during this transfer.
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*
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*/
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void test_transfer_master_fill_sym();
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/** Test that spi_transfer_async() can successfully perform asynchronous transfer
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* in master mode.
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*
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* Given is platform with SPI support.
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* When spi_transfer_async() is called for SPI peripheral operating in master mode.
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* Then function returns true on success, performs transfer and invokes specified callback
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* when the transfer completes (passing the operation status).
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*
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*/
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void test_transfer_master_async();
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/** Test that spi_transfer_async_abort() can successfully abort an on-going async transfer.
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*
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* Given is platform with SPI support.
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* When spi_transfer_async() is called for SPI peripheral operating in master mode and
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* operation is aborted immediately by means of spi_transfer_async_abort().
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* Then operation is successfully performed and specified callback is invoked with
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* the status which indicates that the transfer has been aborted.
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*
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*/
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void test_transfer_master_async_abort();
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/**@}*/
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif
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/**@}*/

targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/TARGET_FRDM/PeripheralNames.h

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@@ -124,14 +124,19 @@ typedef enum {
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DAC_0 = 0
125125
} DACName;
126126

127-
128127
#define SPI_COUNT 3
129128
typedef enum {
130129
SPI_0 = 0,
131130
SPI_1 = 1,
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SPI_2 = 2,
133132
} SPIName;
134133

134+
/* Specify master/slave interfaces for testing purposes. */
135+
#define SPI_TEST_MASTER SPI_2
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#define SPI_TEST_SLAVE SPI_0
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#define SPI_TEST_MASTER_PIN(SPI_PIN) SPI_2##_##SPI_PIN
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#define SPI_TEST_SLAVE_PIN(SPI_PIN) SPI_0##_##SPI_PIN
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135140
#ifdef __cplusplus
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}
137142
#endif

targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/TARGET_FRDM/PinNames.h

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@@ -232,6 +232,26 @@ typedef enum {
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233233
I2C_SCL = D15,
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I2C_SDA = D14,
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/* Note:
237+
This board does not provide SPI MOSI/MISO pins, instead we have SIN/SOUT pins which can be used
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as SPI MOSI/MISO lines depending on SPI operation mode(master or slave):
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master: SIN ---> MISO
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SOUT ---> MOSI
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slave: SIN ---> MOSI
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SOUT ---> MISO
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SPI_0 interface represents SPI pins configuration for slave and SPI_2 respresents spi configuration
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for master.
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*/
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SPI_0_MOSI = PTD3,
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SPI_0_MISO = PTD2,
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SPI_0_SCK = PTD1,
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SPI_0_CS = PTD0,
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SPI_2_MOSI = PTD13,
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SPI_2_MISO = PTB23,
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SPI_2_SCK = PTD12,
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SPI_2_CS = PTB20,
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A0 = PTB7,
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A1 = PTB6,

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/PeripheralNames.h

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@@ -66,6 +66,11 @@ typedef enum {
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SPI_5 = (int)SPI5_BASE,
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SPI_6 = (int)SPI6_BASE
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} SPIName;
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/* Specify master/slave SPI interfaces for testing purposes. */
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#define SPI_TEST_MASTER SPI_1
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#define SPI_TEST_SLAVE SPI_4
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#define SPI_TEST_MASTER_PIN(SPI_PIN) SPI_1##_##SPI_PIN
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#define SPI_TEST_SLAVE_PIN(SPI_PIN) SPI_4##_##SPI_PIN
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typedef enum {
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I2C_1 = (int)I2C1_BASE,

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/PinNames.h

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@@ -269,12 +269,17 @@ typedef enum {
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USBRX = STDIO_UART_RX, // Virtual Com Port
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I2C_SCL = D15,
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I2C_SDA = D14,
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SPI_MOSI = D11,
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SPI_MISO = D12,
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SPI_SCK = D13,
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SPI_CS = D10,
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PWM_OUT = D9,
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274+
SPI_1_MOSI = PB_5,
275+
SPI_1_MISO = PA_6,
276+
SPI_1_SCK = PA_5,
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SPI_1_CS = PA_4,
278+
SPI_4_MOSI = PE_6,
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SPI_4_MISO = PE_5,
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SPI_4_SCK = PE_2,
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SPI_4_CS = PE_4,
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/**** USB pins ****/
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USB_OTG_FS_DM = PA_11,
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USB_OTG_FS_DP = PA_12,

targets/TARGET_STM/stm_spi_api.c

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Original file line numberDiff line numberDiff line change
@@ -525,7 +525,7 @@ uint32_t spi_transfer(spi_t *obj, const void *tx_buffer, uint32_t tx_length,
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out = *(uint8_t *)write_fill;
526526
}
527527
in = spi_write(obj, out);
528-
if (i < rx_length) {
528+
if (rx_buffer && i < rx_length) {
529529
((uint8_t*)rx_buffer)[i] = (uint8_t)in;
530530
}
531531
break;
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536536
out = *(uint16_t *)write_fill;
537537
}
538538
in = spi_write(obj, out);
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if (i < rx_length) {
539+
if (rx_buffer && i < rx_length) {
540540
((uint16_t*)rx_buffer)[i] = (uint16_t)in;
541541
}
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break;

targets/TARGET_TT/TARGET_TT_M3HQ/spi_api.c

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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************
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*/
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#if DEVICE_SPI
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3032
#include "spi_api.h"
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#include "mbed_error.h"
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#include "pinmap.h"
@@ -274,3 +276,4 @@ uint8_t spi_get_module(spi_t *obj)
274276
{
275277
return (uint8_t)(obj->module);
276278
}
279+
#endif

targets/targets.json

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"PWMOUT",
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"SERIAL",
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"SLEEP",
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"SPI",
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"SPISLAVE",
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"TRNG",
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"STDIO_MESSAGES",
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"FLASH",
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"CAN",
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"I2CSLAVE",
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"ANALOGOUT",
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"SPI",
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"SPISLAVE",
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"SERIAL_ASYNCH",
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"SERIAL_FC",
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"EMAC",
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"PWMOUT",
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"SERIAL",
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"SLEEP",
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"SPI",
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"I2C",
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"I2CSLAVE",
77787773
"STDIO_MESSAGES",
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77937788
"CAN",
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"I2CSLAVE",
77957790
"ANALOGOUT",
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"SPI",
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"SPISLAVE",
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"SERIAL_ASYNCH",
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"SERIAL_FC",
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"EMAC",
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78227815
"CAN",
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"I2CSLAVE",
78247817
"ANALOGOUT",
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"SPI",
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"SPISLAVE",
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"SERIAL_ASYNCH",
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"SERIAL_FC",
78297820
"FLASH",

tools/test/examples/examples.json

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"export": true,
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"auto-update" : true
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},
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{
275-
"name": "mbed-os-example-bootloader",
276-
"github":"https://github.com/ARMmbed/mbed-os-example-bootloader",
277-
"mbed": [
278-
"https://os.mbed.com/teams/mbed-os-examples/code/mbed-os-example-bootloader"
279-
],
280-
"test-repo-source": "github",
281-
"features" : [],
282-
"targets" : ["NUCLEO_F429ZI"],
283-
"toolchains" : [],
284-
"exporters": [],
285-
"compile" : true,
286-
"export": true,
287-
"auto-update" : true
288-
},
289274
{
290275
"name": "mbed-os-example-mbed-crypto",
291276
"github":"https://github.com/ARMmbed/mbed-os-example-mbed-crypto",
@@ -352,19 +337,6 @@
352337
"compile" : true,
353338
"export": true,
354339
"auto-update" : true
355-
},
356-
{
357-
"name": "mbed-os-example-sd-driver",
358-
"github":"https://github.com/ARMmbed/mbed-os-example-sd-driver",
359-
"mbed": [],
360-
"test-repo-source": "github",
361-
"features" : [],
362-
"targets" : ["K64F"],
363-
"toolchains" : [],
364-
"exporters": [],
365-
"compile" : true,
366-
"export": true,
367-
"auto-update" : true
368340
}
369341
]
370342
}

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