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Merge pull request #2938 from radhika-raghavendran/master
InterruptIn changes in NCS36510 HAL.
2 parents 4ec2f2e + 7598b05 commit 2175009

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7 files changed

+70
-72
lines changed

7 files changed

+70
-72
lines changed

‎targets/TARGET_ONSEMI/TARGET_NCS36510/clock.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -82,6 +82,7 @@
8282

8383
#define CLOCK_ENABLE(a) CLOCKREG->PDIS.WORD &= ~(1 << a)
8484
#define CLOCK_DISABLE(a) CLOCKREG->PDIS.WORD |= (uint32_t)(1 << a)
85+
#define CLOCK_IS_ENABLED(a) (((CLOCKREG->PDIS.WORD >> a) & 1)?0:1)
8586

8687
/*************************************************************************************************
8788
* *

‎targets/TARGET_ONSEMI/TARGET_NCS36510/gpio_api.c

Lines changed: 17 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -109,9 +109,6 @@ void gpio_init(gpio_t *obj, PinName pin)
109109
/** - Get PAD IO register address for the PAD number */
110110
PadReg_t *PadRegOffset = (PadReg_t*)(PADREG_BASE + (pin * PAD_REG_ADRS_BYTE_SIZE));
111111

112-
/* - Disable the GPIO clock */
113-
CLOCK_DISABLE(CLOCK_GPIO);
114-
115112
/** - Enable the clock for PAD peripheral device */
116113
CLOCK_ENABLE(CLOCK_PAD);
117114

@@ -142,7 +139,7 @@ void gpio_mode(gpio_t *obj, PinMode mode)
142139
*/
143140
void gpio_dir(gpio_t *obj, PinDirection direction)
144141
{
145-
/* Enable the GPIO clock */
142+
/* Enable the GPIO clock which may have been switched off by other drivers */
146143
CLOCK_ENABLE(CLOCK_GPIO);
147144

148145
if (direction == PIN_INPUT) {
@@ -151,8 +148,6 @@ void gpio_dir(gpio_t *obj, PinDirection direction)
151148
obj->GPIOMEMBASE->W_OUT = obj->gpioMask;
152149
}
153150

154-
/* - Disable the GPIO clock */
155-
CLOCK_DISABLE(CLOCK_GPIO);
156151
}
157152

158153
/** Set the output value
@@ -162,7 +157,8 @@ void gpio_dir(gpio_t *obj, PinDirection direction)
162157
*/
163158
void gpio_write(gpio_t *obj, int value)
164159
{
165-
/* Enable the GPIO clock */
160+
161+
/* Enable the GPIO clock which may have been switched off by other drivers */
166162
CLOCK_ENABLE(CLOCK_GPIO);
167163

168164
/* Set the GPIO based on value */
@@ -172,8 +168,6 @@ void gpio_write(gpio_t *obj, int value)
172168
obj->GPIOMEMBASE->R_IRQ_W_CLEAR = obj->gpioMask;
173169
}
174170

175-
/* - Disable the GPIO clock */
176-
CLOCK_DISABLE(CLOCK_GPIO);
177171
}
178172

179173
/** Read the input value
@@ -185,13 +179,23 @@ int gpio_read(gpio_t *obj)
185179
{
186180
int ret;
187181

188-
/* Enable the GPIO clock */
182+
/* Enable the GPIO clock which may have been switched off by other drivers */
189183
CLOCK_ENABLE(CLOCK_GPIO);
190184

191185
ret = (obj->GPIOMEMBASE->R_STATE_W_SET & obj->gpioMask) ? 1: 0;
192186

193-
/* - Disable the GPIO clock */
194-
CLOCK_DISABLE(CLOCK_GPIO);
195-
196187
return ret;
197188
}
189+
190+
/* Checks if gpio object is connected (pin was not initialized with NC)
191+
* @param pin The pin to be set as GPIO
192+
* @return 0 if port is initialized with NC
193+
**/
194+
int gpio_is_connected(const gpio_t *obj)
195+
{
196+
if(obj->gpioPin != (PinName)NC) {
197+
return 1;
198+
} else {
199+
return 0;
200+
}
201+
}

‎targets/TARGET_ONSEMI/TARGET_NCS36510/gpio_irq_api.c

Lines changed: 34 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -79,17 +79,17 @@ static uint32_t gpioIds[NUMBER_OF_GPIO] = {0};
7979

8080
/** Main GPIO IRQ handler called from vector table handler
8181
*
82-
* @param gpioBase The GPIO register base address
83-
* @return void
82+
* @param gpioBase The GPIO register base address
83+
* @return void
8484
*/
8585
void fGpioHandler(void)
8686
{
8787
uint8_t index;
8888
uint32_t active_interrupts = 0;
89-
gpio_irq_event event;
89+
gpio_irq_event event = IRQ_NONE;
9090
GpioReg_pt gpioBase;
9191

92-
/* Enable the GPIO clock */
92+
/* Enable the GPIO clock which may have been switched off by other drivers */
9393
CLOCK_ENABLE(CLOCK_GPIO);
9494

9595
gpioBase = GPIOREG;
@@ -106,15 +106,12 @@ void fGpioHandler(void)
106106
if ((gpioBase->IRQ_POLARITY_SET >> index) &0x01) {
107107
/* Edge triggered high */
108108
event = IRQ_RISE;
109-
} else if ((gpioBase->IRQ_POLARITY_CLEAR >> index) &0x01) {
109+
} else {
110110
/* Edge triggered low */
111111
event = IRQ_FALL;
112-
} else {
113-
/* Edge none */
114-
event = IRQ_NONE;
115112
}
116113
}
117-
gpioBase->IRQ_CLEAR |= (0x1 << index);
114+
gpioBase->IRQ_CLEAR = (0x1 << index);
118115

119116
/* Call the handler registered to the pin */
120117
irq_handler(gpioIds[index], event);
@@ -145,22 +142,16 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
145142
/* Store the ID, this is required by registered handler function */
146143
gpioIds[pin] = id;
147144

148-
/* Enable the GPIO clock */
145+
/* Enable the GPIO clock which may have been switched off by other drivers */
149146
CLOCK_ENABLE(CLOCK_GPIO);
150147

151148
/* Initialize the GPIO membase */
152149
obj->GPIOMEMBASE = GPIOREG;
153150

154151
/* Set default values for the pin interrupt */
155-
/* TODO: Only one DIO line is configured using this function; overrides other DIO line setting
156-
* If mbed layer wants to call this function repeatedly for setting multiple DIO lines as input
157-
* then change this setting to obj->GPIOMEMBASE->W_IN |= obj->pinMask. All parameter setting needs to change from = to |=
158-
*/
159152
obj->GPIOMEMBASE->W_IN = obj->pinMask;
160-
obj->GPIOMEMBASE->IRQ_ENABLE_SET = obj->pinMask;
161153
obj->GPIOMEMBASE->IRQ_EDGE = obj->pinMask;
162-
obj->GPIOMEMBASE->IRQ_POLARITY_SET = (obj->pinMask);
163-
obj->GPIOMEMBASE->ANYEDGE_SET = IO_NONE;
154+
obj->GPIOMEMBASE->IRQ_POLARITY_SET = obj->pinMask;
164155

165156
/* Register the handler for this pin */
166157
irq_handler = handler;
@@ -178,10 +169,11 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
178169
*/
179170
void gpio_irq_free(gpio_irq_t *obj)
180171
{
181-
/* Enable the GPIO clock */
172+
/* Enable the GPIO clock which may have been switched off by other drivers */
182173
CLOCK_ENABLE(CLOCK_GPIO);
183174

184-
obj->GPIOMEMBASE->W_IN = (IO_ALL ^ (obj->pinMask));
175+
/* Disable IRQs to indicate that it is now free */
176+
obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = obj->pinMask;
185177
gpioIds[obj->pin] = 0;
186178
}
187179

@@ -193,42 +185,35 @@ void gpio_irq_free(gpio_irq_t *obj)
193185
*/
194186
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
195187
{
196-
197-
/* Enable the GPIO clock */
188+
/* Enable the GPIO clock which may have been switched off by other drivers */
198189
CLOCK_ENABLE(CLOCK_GPIO);
199-
190+
obj->GPIOMEMBASE->IRQ_EDGE = obj->pinMask;
191+
200192
switch(event) {
201-
case IRQ_RISE:
202-
obj->GPIOMEMBASE->IRQ_EDGE = (obj->pinMask);
203-
obj->GPIOMEMBASE->IRQ_LEVEL = (IO_ALL ^ (obj->pinMask));
204-
/* Enable is an integer; hence checking for 1 or 0*/
205-
if (enable == 1) {
206-
/* Enable rising edge */
207-
obj->GPIOMEMBASE->IRQ_POLARITY_SET = (obj->pinMask);
208-
} else if (enable == 0) {
209-
/* Disable rising edge */
210-
obj->GPIOMEMBASE->IRQ_POLARITY_SET = (IO_ALL ^ (obj->pinMask));
211-
}
212-
break;
193+
case IRQ_RISE:
194+
195+
/* Enable rising edge */
196+
obj->GPIOMEMBASE->IRQ_POLARITY_SET = obj->pinMask;
197+
break;
213198

214199
case IRQ_FALL:
215-
obj->GPIOMEMBASE->IRQ_EDGE = (obj->pinMask);
216-
obj->GPIOMEMBASE->IRQ_LEVEL = (IO_ALL ^ (obj->pinMask));
217-
/* Enable is an integer; hence checking for 1 or 0*/
218-
if (enable == 1) {
219-
/* Enable falling edge */
220-
obj->GPIOMEMBASE->IRQ_POLARITY_CLEAR = (obj->pinMask);
221-
} else if (enable == 0) {
222-
/* Disable falling edge */
223-
obj->GPIOMEMBASE->IRQ_POLARITY_CLEAR = (IO_ALL ^ (obj->pinMask));
224-
}
200+
201+
/* Enable falling edge */
202+
obj->GPIOMEMBASE->IRQ_POLARITY_CLEAR = obj->pinMask;
225203
break;
226204

227205
default:
228206
/* No event is set */
229207
break;
230208
}
209+
/* Enable the IRQ based on enable parameter */
210+
if (enable) {
211+
212+
obj->GPIOMEMBASE->IRQ_ENABLE_SET = obj->pinMask;
213+
} else {
231214

215+
obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = obj->pinMask;
216+
}
232217
}
233218

234219
/** Enable GPIO IRQ
@@ -238,10 +223,10 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
238223
*/
239224
void gpio_irq_enable(gpio_irq_t *obj)
240225
{
241-
/* Enable the GPIO clock */
226+
/* Enable the GPIO clock which may have been switched off by other drivers */
242227
CLOCK_ENABLE(CLOCK_GPIO);
243228

244-
obj->GPIOMEMBASE->IRQ_ENABLE_SET = (obj->pinMask);
229+
obj->GPIOMEMBASE->IRQ_ENABLE_SET = obj->pinMask;
245230
}
246231

247232
/** Disable GPIO IRQ
@@ -251,10 +236,11 @@ void gpio_irq_enable(gpio_irq_t *obj)
251236
*/
252237
void gpio_irq_disable(gpio_irq_t *obj)
253238
{
254-
/* Enable the GPIO clock */
239+
240+
/* Enable the GPIO clock which may have been switched off by other drivers */
255241
CLOCK_ENABLE(CLOCK_GPIO);
256242

257-
obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = (obj->pinMask);
243+
obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = obj->pinMask;
258244
}
259245

260246
#endif //DEVICE_INTERRUPTIN

‎targets/TARGET_ONSEMI/TARGET_NCS36510/ncs36510Init.c

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -83,6 +83,13 @@ boolean fTrim()
8383
RFANATRIMREG->TX_VCO_TRIM_LUT1 = TRIMREG->TX_VCO_LUT1.WORD;;
8484
RFANATRIMREG->TX_VCO_TRIM_LUT2 = TRIMREG->TX_VCO_LUT2.WORD;;
8585

86+
if ( TRIMREG->MAC_ADDR_LOW != 0xFFFFFFFF ) {
87+
MACHWREG->LONG_ADDRESS_LOW = TRIMREG->MAC_ADDR_LOW;
88+
}
89+
90+
if ( TRIMREG->MAC_ADDR_HIGH != 0xFFFFFFFF ) {
91+
MACHWREG->LONG_ADDRESS_HIGH = TRIMREG->MAC_ADDR_HIGH;
92+
}
8693

8794
return True;
8895
} else {
@@ -158,15 +165,16 @@ void fPmuInit()
158165
SCB->SCR &= ~SCB_SCR_SLEEPONEXIT_Msk;
159166

160167
/** Set regulator timings */
161-
PMUREG->FVDD_TSETTLE = 160;
162-
PMUREG->FVDD_TSTARTUP = 400;
168+
PMUREG->FVDD_TSETTLE = 160;
169+
PMUREG->FVDD_TSTARTUP = 400;
170+
163171

164172
/** Keep SRAMA & SRAMB powered in coma mode */
165173
PMUREG->CONTROL.BITS.SRAMA = False;
166174
PMUREG->CONTROL.BITS.SRAMB = False;
167175

168-
PMUREG->CONTROL.BITS.N1V1 = True; /* Enable ACTIVE mode switching regulator */
169-
PMUREG->CONTROL.BITS.C1V1 = True; /* Enable COMA mode switching regulator */
176+
PMUREG->CONTROL.BITS.N1V1 = True; /* Enable ACTIVE mode switching regulator */
177+
PMUREG->CONTROL.BITS.C1V1 = True; /* Enable COMA mode switching regulator */
170178

171179
/** Disable the clock for PMU peripheral device, all settings are done */
172180
CLOCK_DISABLE(CLOCK_PMU);

‎targets/TARGET_ONSEMI/TARGET_NCS36510/pinmap.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -75,7 +75,6 @@ void pin_mode(PinName pin, PinMode mode)
7575

7676
default:
7777
break;
78-
7978
}
8079

8180
/** - Disable the clock for PAD peripheral device */

‎targets/TARGET_ONSEMI/TARGET_NCS36510/serial_api.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -132,8 +132,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
132132
PadRegOffset = (PadReg_t*)(PADREG_BASE + (rx * PAD_REG_ADRS_BYTE_SIZE));
133133
PadRegOffset->PADIO0.WORD = PAD_UART_RX; /* Pad settings for UART Rx */
134134

135-
GPIOREG->W_OUT |= (True << tx); /* tx as OUT direction */
136-
GPIOREG->W_IN |= (True << rx); /* rx as IN directon */
135+
GPIOREG->W_OUT = (0x1 << tx); /* tx as OUT direction */
136+
GPIOREG->W_IN = (0x1 << rx); /* rx as IN directon */
137137

138138
CLOCK_DISABLE(CLOCK_PAD);
139139
CLOCK_DISABLE(CLOCK_CROSSB);

‎targets/TARGET_ONSEMI/TARGET_NCS36510/trim_map.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -50,10 +50,10 @@
5050
**************************************************************************************************/
5151

5252
/** trim register map */
53-
typedef struct { /**< REV B REV D */
54-
__I uint32_t PAD0; /**< 0x1FA0 0x1FA0 */
55-
__I uint32_t APP_RESERVED0; /**< 0x1FA4 0x1FA4 */
56-
__I uint32_t APP_RESERVED1; /**< 0x1FA8 0x1FA8 */
53+
typedef struct { /**< REV B REV D */
54+
__I uint32_t PAD0; /**< 0x1FA0 0x1FA0 */
55+
__I uint32_t MAC_ADDR_LOW; /**< 0x1FA4 */
56+
__I uint32_t MAC_ADDR_HIGH; /**< 0x1FA8 */
5757
#ifdef REVB
5858
__I uint32_t TX_POWER; /**< 0x1FAC */
5959
#endif

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