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Merge pull request #10534 from OpenNuvoton/nuvoton_nano130_fix-vectab-virtual
NANO130: Fix optimization error with NVIC_SetVector/NVIC_GetVector on ARMC6
2 parents 571caad + fcab482 commit 22d78b4

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2 files changed

+18
-9
lines changed

2 files changed

+18
-9
lines changed

targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,14 +19,15 @@ define memory mem with size = 4G;
1919
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];
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22+
define block ROMVEC with alignment = 8 { readonly section .intvec };
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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29-
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
30+
place at address mem:__ICFEDIT_intvec_start__ { block ROMVEC };
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place in ROM_region { readonly };
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place at start of IRAM_region { block CSTACK };

targets/TARGET_NUVOTON/TARGET_NANO100/device/cmsis_nvic.h

Lines changed: 16 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -23,18 +23,26 @@
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#define NVIC_USER_IRQ_NUMBER 32
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#define NVIC_NUM_VECTORS (NVIC_USER_IRQ_OFFSET + NVIC_USER_IRQ_NUMBER)
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26-
#if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
27-
# define NVIC_RAM_VECTOR_ADDRESS ((uint32_t) &Image$$ER_IRAMVEC$$ZI$$Base)
26+
/* Avoid optimization error on e.g. ARMC6
27+
*
28+
* If NVIC_FLASH_VECTOR_ADDRESS is directly defined as 0, the compiler would see it
29+
* as NULL, and deliberately optimize NVIC_GetVector to an undefined instruction -
30+
* trapping because we're accessing an array at NULL.
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*
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* A suggested solution by Arm is to define NVIC_FLASH_VECTOR_ADDRESS as a symbol
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* instead to avoid such unwanted optimization.
34+
*/
35+
#if defined(__ARMCC_VERSION)
36+
extern uint32_t Image$$ER_IROM1$$Base;
37+
#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t) &Image$$ER_IROM1$$Base)
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#elif defined(__ICCARM__)
29-
# pragma section = "IRAMVEC"
30-
# define NVIC_RAM_VECTOR_ADDRESS ((uint32_t) __section_begin("IRAMVEC"))
39+
#pragma section = "ROMVEC"
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#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t) __section_begin("ROMVEC"))
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#elif defined(__GNUC__)
32-
# define NVIC_RAM_VECTOR_ADDRESS ((uint32_t) &__start_vector_table__)
42+
extern uint32_t __vector_table;
43+
#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t) &__vector_table)
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#endif
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35-
36-
#define NVIC_FLASH_VECTOR_ADDRESS 0
37-
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#ifdef __cplusplus
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extern "C" {
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#endif

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