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targets/TARGET_NUVOTON/TARGET_NANO100/device Expand file tree Collapse file tree 2 files changed +18
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lines changed Original file line number Diff line number Diff line change @@ -19,14 +19,15 @@ define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];
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+ define block ROMVEC with alignment = 8 { readonly section .intvec };
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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- place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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+ place at address mem:__ICFEDIT_intvec_start__ { block ROMVEC };
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place in ROM_region { readonly };
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place at start of IRAM_region { block CSTACK };
Original file line number Diff line number Diff line change 23
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#define NVIC_USER_IRQ_NUMBER 32
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#define NVIC_NUM_VECTORS (NVIC_USER_IRQ_OFFSET + NVIC_USER_IRQ_NUMBER)
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- #if defined(__CC_ARM ) || (defined(__ARMCC_VERSION ) && (__ARMCC_VERSION >= 6010050 ))
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- # define NVIC_RAM_VECTOR_ADDRESS ((uint32_t) &Image$$ER_IRAMVEC$$ZI$$Base)
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+ /* Avoid optimization error on e.g. ARMC6
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+ *
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+ * If NVIC_FLASH_VECTOR_ADDRESS is directly defined as 0, the compiler would see it
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+ * as NULL, and deliberately optimize NVIC_GetVector to an undefined instruction -
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+ * trapping because we're accessing an array at NULL.
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+ *
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+ * A suggested solution by Arm is to define NVIC_FLASH_VECTOR_ADDRESS as a symbol
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+ * instead to avoid such unwanted optimization.
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+ */
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+ #if defined(__ARMCC_VERSION )
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+ extern uint32_t Image$$ER_IROM1$$Base ;
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+ #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t) &Image$$ER_IROM1$$Base)
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#elif defined(__ICCARM__ )
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- # pragma section = "IRAMVEC "
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- # define NVIC_RAM_VECTOR_ADDRESS ((uint32_t) __section_begin("IRAMVEC "))
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+ #pragma section = "ROMVEC "
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+ #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t) __section_begin("ROMVEC "))
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#elif defined(__GNUC__ )
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- # define NVIC_RAM_VECTOR_ADDRESS ((uint32_t) &__start_vector_table__)
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+ extern uint32_t __vector_table ;
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+ #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t) &__vector_table)
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#endif
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-
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- #define NVIC_FLASH_VECTOR_ADDRESS 0
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-
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#ifdef __cplusplus
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extern "C" {
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#endif
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