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Update SAML21J18A target to Mbed OS 5.11
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‎targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21/device/cmsis_nvic.c

Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,56 @@
1+
/* mbed Microcontroller Library
2+
* CMSIS-style functionality to support dynamic vectors
3+
*******************************************************************************
4+
* Copyright (c) 2011 ARM Limited. All rights reserved.
5+
* All rights reserved.
6+
*
7+
* Redistribution and use in source and binary forms, with or without
8+
* modification, are permitted provided that the following conditions are met:
9+
*
10+
* 1. Redistributions of source code must retain the above copyright notice,
11+
* this list of conditions and the following disclaimer.
12+
* 2. Redistributions in binary form must reproduce the above copyright notice,
13+
* this list of conditions and the following disclaimer in the documentation
14+
* and/or other materials provided with the distribution.
15+
* 3. Neither the name of ARM Limited nor the names of its contributors
16+
* may be used to endorse or promote products derived from this software
17+
* without specific prior written permission.
18+
*
19+
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20+
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21+
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22+
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
23+
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24+
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25+
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
26+
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27+
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28+
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29+
*******************************************************************************
30+
*/
31+
#include "cmsis_nvic.h"
32+
33+
#define NVIC_FLASH_VECTOR_ADDRESS (0x0) // Initial vector position in flash
34+
35+
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
36+
{
37+
uint32_t *vectors = (uint32_t*)SCB->VTOR;
38+
uint32_t i;
39+
40+
// Copy and switch to dynamic vectors if the first time called
41+
if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
42+
uint32_t *old_vectors = vectors;
43+
vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
44+
for (i=0; i<NVIC_NUM_VECTORS; i++) {
45+
vectors[i] = old_vectors[i];
46+
}
47+
SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
48+
}
49+
vectors[IRQn + 16] = vector;
50+
}
51+
52+
uint32_t NVIC_GetVector(IRQn_Type IRQn)
53+
{
54+
uint32_t *vectors = (uint32_t*)SCB->VTOR;
55+
return vectors[IRQn + 16];
56+
}

‎targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21/device/cmsis_nvic.h

Lines changed: 16 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
11
/* mbed Microcontroller Library
2+
* CMSIS-style functionality to support dynamic vectors
23
*******************************************************************************
34
* Copyright (c) 2011 ARM Limited. All rights reserved.
45
* All rights reserved.
@@ -31,7 +32,21 @@
3132
#ifndef MBED_CMSIS_NVIC_H
3233
#define MBED_CMSIS_NVIC_H
3334

34-
#define NVIC_NUM_VECTORS (16 + 29) // CORE + MCU Peripherals
35+
#define NVIC_USER_IRQ_OFFSET 16
36+
#define NVIC_NUM_VECTORS (NVIC_USER_IRQ_OFFSET + 29) // CORE + MCU Peripherals
3537
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM
3638

39+
#include "cmsis.h"
40+
41+
#ifdef __cplusplus
42+
extern "C" {
43+
#endif
44+
45+
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
46+
uint32_t NVIC_GetVector(IRQn_Type IRQn);
47+
48+
#ifdef __cplusplus
49+
}
50+
#endif
51+
3752
#endif

‎targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_GCC_ARM/saml21j18a.ld

Lines changed: 45 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -8,23 +8,32 @@ SEARCH_DIR(.)
88

99
STACK_SIZE = MBED_BOOT_STACK_SIZE;
1010

11+
#define ROM_START 0x00000000
12+
#define ROM_SIZE 0x00040000
13+
#define RAM_START 0x20000000
14+
#define RAM_SIZE 0x00008000
15+
#define VECTORS 45 /* This value must match NVIC_NUM_VECTORS */
16+
17+
#define VECTORS_SIZE (VECTORS * 4)
18+
1119
/* Memory Spaces Definitions */
1220
MEMORY {
13-
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000
14-
ram (rwx) : ORIGIN = 0x20000000 + 0xB8, LENGTH = 0x00008000 - 0xB8
15-
}
21+
rom (rx) : ORIGIN = ROM_START, LENGTH = ROM_SIZE
22+
ram (rwx) : ORIGIN = RAM_START + VECTORS_SIZE, LENGTH = RAM_SIZE - VECTORS_SIZE
23+
}
1624

17-
/* Section Definitions */
18-
SECTIONS {
19-
.text :
25+
/* Section Definitions */
26+
SECTIONS {
27+
.text :
2028
{
21-
. = ALIGN(8);
29+
__data_start__ = .;
30+
. = ALIGN(4);
2231
_sfixed = .;
32+
KEEP(*(.isr_vector))
2333
KEEP(*(.vectors .vectors.*))
2434
*(.text .text.* .gnu.linkonce.t.*)
2535
*(.glue_7t) *(.glue_7)
2636
*(.rodata .rodata* .gnu.linkonce.r.*)
27-
*(.ARM.extab* .gnu.linkonce.armextab.*)
2837

2938
/* Support C constructors, and C destructors in both user code
3039
and the C library. This also provides support for C++ code. */
@@ -60,21 +69,30 @@ MEMORY {
6069
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
6170
KEEP (*(SORT(.dtors.*)))
6271
KEEP (*crtend.o(.dtors))
72+
KEEP(*(.jcr*))
73+
74+
KEEP(*(.eh_frame*))
6375

6476
. = ALIGN(8);
6577
_efixed = .; /* End of text section */
6678
} > rom
6779

80+
.ARM.extab :
81+
{
82+
*(.ARM.extab* .gnu.linkonce.armextab.*)
83+
} > rom
84+
6885
/* .ARM.exidx is sorted, so has to go in its own output section. */
69-
PROVIDE_HIDDEN (__exidx_start = .);
70-
.ARM.exidx :
86+
__exidx_start = .;
87+
.ARM.exidx :
7188
{
7289
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
7390
} > rom
74-
PROVIDE_HIDDEN (__exidx_end = .);
91+
__exidx_end = .;
7592

7693
. = ALIGN(8);
7794
_etext = .;
95+
__etext = .;
7896

7997
.relocate :
8098
AT (_etext)
@@ -85,42 +103,43 @@ MEMORY {
85103
*(.data .data.*);
86104
. = ALIGN(8);
87105
_erelocate = .;
106+
__data_end__ = .;
88107
} > ram
89108

90109
/* .bss section which is used for uninitialized data */
91110
.bss (NOLOAD) :
92111
{
93-
. = ALIGN(8);
112+
. = ALIGN(4);
113+
__bss_start__ = .;
94114
_sbss = . ;
95115
_szero = .;
96116
*(.bss .bss.*)
97117
*(COMMON)
98118
. = ALIGN(8);
99119
_ebss = . ;
100120
_ezero = .;
121+
__bss_end__ = .;
101122
} > ram
102123

103-
.heap (NOLOAD) :
124+
.heap (COPY):
104125
{
105-
. = ALIGN(8);
106-
__end__ = . ;
126+
__end__ = .;
127+
PROVIDE(end = .);
128+
__HeapBase = .;
129+
*(.heap*)
107130
. = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE;
108-
} > ram
109-
110-
/* stack section */
111-
.stack (NOLOAD):
112-
{
113-
. = ALIGN(8);
114-
_sstack = .;
115-
. = . + STACK_SIZE;
116-
. = ALIGN(8);
117-
_estack = .;
131+
__HeapLimit = .;
132+
__heap_limit = .; /* Add for _sbrk */
118133
} > ram
119134

120135
/* Set stack top to end of RAM, and stack limit move down by
121136
* size of stack_dummy section */
122-
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
137+
__StackTop = ORIGIN(ram) + LENGTH(ram);
123138
__StackLimit = __StackTop - STACK_SIZE;
139+
PROVIDE(__stack = __StackTop);
140+
141+
_sstack = __StackTop;
142+
_estack = __StackLimit;
124143

125144
. = ALIGN(8);
126145
}

‎targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_GCC_ARM/startup_saml21.c

Lines changed: 17 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -57,11 +57,20 @@ extern uint32_t _ezero;
5757
extern uint32_t _sstack;
5858
extern uint32_t _estack;
5959

60-
/** \cond DOXYGEN_SHOULD_SKIP_THIS */
60+
#ifdef MBED_CONF_RTOS_PRESENT
61+
extern void __libc_init_array(void);
62+
extern int main(void);
63+
#else
64+
/** \cond DOXYGEN_SHOULD_SKIP_THIS */
6165
int main(void);
6266
/** \endcond */
6367

6468
void __libc_init_array(void);
69+
#endif
70+
71+
/* Reset entry point*/
72+
void software_init_hook(void);
73+
void pre_main(void) __attribute__((weak));
6574

6675
/* Default empty handler */
6776
void Dummy_Handler(void);
@@ -258,14 +267,17 @@ void Reset_Handler(void)
258267
pSrc = (uint32_t *) & _sfixed;
259268
SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
260269

261-
/* Initialize the C library */
262-
__libc_init_array();
263-
264270
/* Overwriting the default value of the NVMCTRL.CTRLB.MANW bit (errata reference 13134) */
265271
NVMCTRL->CTRLB.bit.MANW = 1;
266272

267-
/* Branch to main function */
273+
SystemInit();
274+
275+
#ifdef MBED_CONF_RTOS_PRESENT
276+
software_init_hook();
277+
#else
278+
__libc_init_array();
268279
main();
280+
#endif
269281

270282
/* Infinite loop */
271283
while (1);

‎targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/extint/TARGET_SAML21/extint.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -315,9 +315,9 @@ void extint_chan_set_config(
315315

316316
/* Config asynchronous edge detection */
317317
if (config->enable_async_edge_detection) {
318-
EIC_module->EIC_ASYNCH.reg |= (1UL << channel);
318+
EIC_module->ASYNCH.reg |= (1UL << channel);
319319
} else {
320-
EIC_module->EIC_ASYNCH.reg &= (EIC_EIC_ASYNCH_MASK & (~(1UL << channel)));
320+
EIC_module->ASYNCH.reg &= (EIC_ASYNCH_MASK & (~(1UL << channel)));
321321
}
322322

323323
_extint_enable();

‎targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/rtc/TARGET_SAML21/rtc_count.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -210,7 +210,7 @@ static enum status_code _rtc_count_set_config(
210210

211211
#if SAML21
212212
rtc_module->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_MODE(0) | config->prescaler
213-
| (config->enable_read_sync << RTC_MODE0_CTRLA_SYNCDIS_Pos);
213+
| (config->enable_read_sync << RTC_MODE0_CTRLA_COUNTSYNC_Pos);
214214
#endif
215215
#if (SAMC20) || (SAMC21)
216216
rtc_module->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_MODE(0) | config->prescaler

‎targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/system/clock/TARGET_SAML21/clock_feature.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -948,9 +948,9 @@ static inline void system_main_clock_set_failure_detect(
948948
const bool enable)
949949
{
950950
if (enable) {
951-
MCLK->CTRLA.reg |= MCLK_CTRLA_CFDEN;
951+
MCLK->CTRLA.reg |= 4;
952952
} else {
953-
MCLK->CTRLA.reg &= ~MCLK_CTRLA_CFDEN;
953+
MCLK->CTRLA.reg &= ~4;
954954
}
955955
}
956956

‎targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/system/power/TARGET_SAML21/power.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -840,7 +840,7 @@ static inline void system_standby_set_config(
840840
PM->STDBYCFG.reg = PM_STDBYCFG_PDCFG(config->power_domain)
841841
| (config->enable_dpgpd0 << PM_STDBYCFG_DPGPD0_Pos)
842842
| (config->enable_dpgpd1 << PM_STDBYCFG_DPGPD1_Pos)
843-
| (config->disable_avregsd << PM_STDBYCFG_AVREGSD_Pos)
843+
| (config->disable_avregsd << 7)
844844
| PM_STDBYCFG_LINKPD(config->linked_power_domain)
845845
| PM_STDBYCFG_BBIASHS(config->hmcramchs_back_bias)
846846
| PM_STDBYCFG_BBIASLP(config->hmcramclp_back_bias);

‎targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/system/reset/TARGET_SAML21/reset.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -103,7 +103,7 @@ enum system_wakeup_debounce_count {
103103
/** No debouncing */
104104
SYSTEM_WAKEUP_DEBOUNCE_OFF = RSTC_WKDBCONF_WKDBCNT_OFF,
105105
/** Input pin shall be active for at least two 32KHz clock periods */
106-
SYSTEM_WAKEUP_DEBOUNCE_2CK32 = RSTC_WKDBCONF_WKDBCNT_2K32,
106+
SYSTEM_WAKEUP_DEBOUNCE_2CK32 = RSTC_WKDBCONF_WKDBCNT_2CK32,
107107
/** Input pin shall be active for at least three 32KHz clock periods */
108108
SYSTEM_WAKEUP_DEBOUNCE_3CK32 = RSTC_WKDBCONF_WKDBCNT_3CK32,
109109
/** Input pin shall be active for at least 32 32KHz clock periods */

‎targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/tc/tc.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1451,7 +1451,7 @@ static inline void tc_dma_trigger_command(
14511451

14521452
#if SAML21
14531453
/* Write command to execute */
1454-
tc_module->CTRLBSET.reg = TC_CTRLBSET_CMD(TC_CTRLBSET_CMD_DMATRG_Val);
1454+
tc_module->CTRLBSET.reg = TC_CTRLBSET_CMD(TC_CTRLBSET_CMD_DMAOS_Val);
14551455
#endif
14561456
#if (SAMC20) || (SAMC21)
14571457
/* Write command to execute */

‎targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/tcc/tcc.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,7 @@
5757
SYSTEM_INTERRUPT_MODULE_TCC##n,
5858
#endif
5959

60+
#define min(a, b) (((a) < (b)) ? (a) : (b))
6061
#define _SIZE_MAX(size) ((size==32u) ? 0xFFFFFFFF : ( \
6162
(1u << size) - 1))
6263

‎targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/tcc/tcc.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2008,7 +2008,7 @@ static inline void tcc_dma_trigger_command(
20082008
}
20092009

20102010
/* Write command to execute */
2011-
tcc_module->CTRLBSET.reg = TCC_CTRLBSET_CMD_DMATRG;
2011+
tcc_module->CTRLBSET.reg = TCC_CTRLBSET_CMD_DMAOS;
20122012
}
20132013
/** @} */
20142014
#endif

‎targets/TARGET_Atmel/TARGET_SAM_CortexM0P/us_ticker.c

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@
1717
#include "us_ticker_api.h"
1818
#include "cmsis.h"
1919
#include "mbed_assert.h"
20-
#include "ins_gclk.h"
20+
#include "gclk.h"
2121
#include "compiler.h"
2222
#include "system.h"
2323
#include "tc.h"
@@ -155,6 +155,11 @@ void us_ticker_disable_interrupt(void)
155155
NVIC_DisableIRQ(TICKER_COUNTER_IRQn);
156156
}
157157

158+
void us_ticker_fire_interrupt(void)
159+
{
160+
NVIC_SetPendingIRQ(TICKER_COUNTER_IRQn);
161+
}
162+
158163
void us_ticker_clear_interrupt(void)
159164
{
160165
uint32_t status_flags;

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