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Merge pull request #5932 from ARMmbed/revert-5821-add_BL_nucleo-f746zg
Revert "STM32F7: Add bootloader support"
2 parents 98611c8 + 6d52c1c commit 26d0c6d

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12 files changed

+23
-94
lines changed

12 files changed

+23
-94
lines changed

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/system_clock.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,6 @@
3030
**/
3131

3232
#include "stm32f7xx.h"
33-
#include "nvic_addr.h"
3433
#include "mbed_assert.h"
3534

3635
/*!< Uncomment the following line if you need to relocate your vector Table in
@@ -93,7 +92,7 @@ void SystemInit(void)
9392
#ifdef VECT_TAB_SRAM
9493
SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
9594
#else
96-
SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
95+
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
9796
#endif
9897

9998
}

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_MICRO/stm32f746xg.sct

Lines changed: 2 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,3 @@
1-
#! armcc -E
21
; Scatter-Loading Description File
32
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
43
; Copyright (c) 2016, STMicroelectronics
@@ -28,18 +27,10 @@
2827
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2928
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3029

31-
#if !defined(MBED_APP_START)
32-
#define MBED_APP_START 0x08000000
33-
#endif
34-
35-
#if !defined(MBED_APP_SIZE)
36-
#define MBED_APP_SIZE 0x100000
37-
#endif
38-
3930
; STM32F746NG: 1024 KB FLASH (0x100000) + 320 KB SRAM (0x50000)
40-
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
31+
LR_IROM1 0x08000000 0x100000 { ; load region size_region
4132

42-
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
33+
ER_IROM1 0x08000000 0x100000 { ; load address = execution address
4334
*.o (RESET, +First)
4435
*(InRoot$$Sections)
4536
.ANY (+RO)

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_STD/stm32f746xg.sct

Lines changed: 2 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,3 @@
1-
#! armcc -E
21
; Scatter-Loading Description File
32
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
43
; Copyright (c) 2016, STMicroelectronics
@@ -28,18 +27,10 @@
2827
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2928
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3029

31-
#if !defined(MBED_APP_START)
32-
#define MBED_APP_START 0x08000000
33-
#endif
34-
35-
#if !defined(MBED_APP_SIZE)
36-
#define MBED_APP_SIZE 0x100000
37-
#endif
38-
3930
; STM32F746NG: 1024 KB FLASH (0x100000) + 320 KB SRAM (0x50000)
40-
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
31+
LR_IROM1 0x08000000 0x100000 { ; load region size_region
4132

42-
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
33+
ER_IROM1 0x08000000 0x100000 { ; load address = execution address
4334
*.o (RESET, +First)
4435
*(InRoot$$Sections)
4536
.ANY (+RO)

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_GCC_ARM/STM32F746xG.ld

Lines changed: 1 addition & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,16 +1,7 @@
11
/* Linker script to configure memory regions. */
2-
3-
#if !defined(MBED_APP_START)
4-
#define MBED_APP_START 0x08000000
5-
#endif
6-
7-
#if !defined(MBED_APP_SIZE)
8-
#define MBED_APP_SIZE 1024K
9-
#endif
10-
112
MEMORY
123
{
13-
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
4+
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
145
RAM (rwx) : ORIGIN = 0x200001C8, LENGTH = 320K - 0x1C8
156
}
167

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_IAR/stm32f746xg.icf

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,7 @@
1-
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
2-
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
3-
41
/* [ROM = 1024kb = 0x100000] */
5-
define symbol __intvec_start__ = MBED_APP_START;
6-
define symbol __region_ROM_start__ = MBED_APP_START;
7-
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
2+
define symbol __intvec_start__ = 0x08000000;
3+
define symbol __region_ROM_start__ = 0x08000000;
4+
define symbol __region_ROM_end__ = 0x080FFFFF;
85

96
/* [RAM = 320kb = 0x50000] Vector table dynamic copy: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM */
107
define symbol __NVIC_start__ = 0x20000000;

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/system_clock.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,6 @@
3030
**/
3131

3232
#include "stm32f7xx.h"
33-
#include "nvic_addr.h"
3433
#include "mbed_assert.h"
3534

3635
/*!< Uncomment the following line if you need to relocate your vector Table in
@@ -93,7 +92,7 @@ void SystemInit(void)
9392
#ifdef VECT_TAB_SRAM
9493
SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
9594
#else
96-
SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
95+
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
9796
#endif
9897

9998
}

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_MICRO/stm32f767xi.sct

Lines changed: 2 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,3 @@
1-
#! armcc -E
21
; Scatter-Loading Description File
32
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
43
; Copyright (c) 2016, STMicroelectronics
@@ -28,18 +27,10 @@
2827
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2928
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3029

31-
#if !defined(MBED_APP_START)
32-
#define MBED_APP_START 0x08000000
33-
#endif
34-
35-
#if !defined(MBED_APP_SIZE)
36-
#define MBED_APP_SIZE 0x200000
37-
#endif
38-
3930
; STM32F767ZI: 2048 KB FLASH (0x200000) + 512 KB SRAM (0x80000)
40-
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
31+
LR_IROM1 0x08000000 0x200000 { ; load region size_region
4132

42-
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
33+
ER_IROM1 0x08000000 0x200000 { ; load address = execution address
4334
*.o (RESET, +First)
4435
*(InRoot$$Sections)
4536
.ANY (+RO)

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_STD/stm32f767xi.sct

Lines changed: 2 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,3 @@
1-
#! armcc -E
21
; Scatter-Loading Description File
32
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
43
; Copyright (c) 2016, STMicroelectronics
@@ -28,18 +27,10 @@
2827
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2928
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3029

31-
#if !defined(MBED_APP_START)
32-
#define MBED_APP_START 0x08000000
33-
#endif
34-
35-
#if !defined(MBED_APP_SIZE)
36-
#define MBED_APP_SIZE 0x200000
37-
#endif
38-
3930
; STM32F767ZI: 2048 KB FLASH (0x200000) + 512 KB SRAM (0x80000)
40-
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
31+
LR_IROM1 0x08000000 0x200000 { ; load region size_region
4132

42-
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
33+
ER_IROM1 0x08000000 0x200000 { ; load address = execution address
4334
*.o (RESET, +First)
4435
*(InRoot$$Sections)
4536
.ANY (+RO)

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_GCC_ARM/STM32F767xI.ld

Lines changed: 1 addition & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,16 +1,7 @@
11
/* Linker script to configure memory regions. */
2-
3-
#if !defined(MBED_APP_START)
4-
#define MBED_APP_START 0x08000000
5-
#endif
6-
7-
#if !defined(MBED_APP_SIZE)
8-
#define MBED_APP_SIZE 2048K
9-
#endif
10-
112
MEMORY
123
{
13-
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
4+
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
145
RAM (rwx) : ORIGIN = 0x200001F8, LENGTH = 512K - 0x1F8
156
}
167

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_IAR/stm32f767xi.icf

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,7 @@
1-
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
2-
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x200000; }
3-
41
/* [ROM = 2048kb = 0x200000] */
5-
define symbol __intvec_start__ = MBED_APP_START;
6-
define symbol __region_ROM_start__ = MBED_APP_START;
7-
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
2+
define symbol __intvec_start__ = 0x08000000;
3+
define symbol __region_ROM_start__ = 0x08000000;
4+
define symbol __region_ROM_end__ = 0x081FFFFF;
85

96
/* [RAM = 512kb = 0x80000] Vector table dynamic copy: 126 vectors = 504 bytes (0x1F8) to be reserved in RAM */
107
define symbol __NVIC_start__ = 0x20000000;

‎targets/TARGET_STM/mbed_overrides.c

Lines changed: 3 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -35,16 +35,9 @@ void mbed_sdk_init()
3535
HAL_Init();
3636

3737
#if TARGET_STM32F7
38-
// The mbed_sdk_init can be called either during cold boot or during
39-
// application boot after bootloader has been executed.
40-
// In case the bootloader has already enabled the cache,
41-
// is is needed to not enable it again.
42-
if (SCB->CCR & (uint32_t)SCB_CCR_IC_Msk == 0) { // If ICache is disabled
43-
SCB_EnableICache();
44-
}
45-
if (SCB->CCR & (uint32_t)SCB_CCR_DC_Msk == 0) { // If DCache is disabled
46-
SCB_EnableDCache();
47-
}
38+
// Enable CPU L1-Cache
39+
SCB_EnableICache();
40+
SCB_EnableDCache();
4841
#endif /* TARGET_STM32F7 */
4942

5043
/* Configure the System clock source, PLL Multiplier and Divider factors,

‎targets/targets.json

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1294,8 +1294,7 @@
12941294
"device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
12951295
"features": ["LWIP"],
12961296
"release_versions": ["2", "5"],
1297-
"device_name": "STM32F746ZG",
1298-
"bootloader_supported": true
1297+
"device_name": "STM32F746ZG"
12991298
},
13001299
"NUCLEO_F756ZG": {
13011300
"inherits": ["FAMILY_STM32"],
@@ -1351,8 +1350,7 @@
13511350
"device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
13521351
"features": ["LWIP"],
13531352
"release_versions": ["2", "5"],
1354-
"device_name": "STM32F767ZI",
1355-
"bootloader_supported": true
1353+
"device_name": "STM32F767ZI"
13561354
},
13571355
"NUCLEO_L011K4": {
13581356
"inherits": ["FAMILY_STM32"],

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