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Add XIP capability, enable QSPI. XIP can be enable by adding macro XIP_ENABLE in mbed_app.json. It's disabled by default.
1 parent 3d5489a commit 26da29f

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9 files changed

+236
-72
lines changed

9 files changed

+236
-72
lines changed

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/GeneratedSource/cycfg_qspi_memslot.c

Lines changed: 23 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@
2424

2525
#include "cycfg_qspi_memslot.h"
2626

27-
cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readCmd =
27+
const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readCmd =
2828
{
2929
/* The 8-bit command. 1 x I/O read command. */
3030
.command = 0xEBU,
@@ -42,7 +42,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readCmd =
4242
.dataWidth = CY_SMIF_WIDTH_QUAD
4343
};
4444

45-
cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeEnCmd =
45+
const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeEnCmd =
4646
{
4747
/* The 8-bit command. 1 x I/O read command. */
4848
.command = 0x06U,
@@ -60,7 +60,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeEnCmd =
6060
.dataWidth = CY_SMIF_WIDTH_SINGLE
6161
};
6262

63-
cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeDisCmd =
63+
const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeDisCmd =
6464
{
6565
/* The 8-bit command. 1 x I/O read command. */
6666
.command = 0x04U,
@@ -78,7 +78,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeDisCmd =
7878
.dataWidth = CY_SMIF_WIDTH_SINGLE
7979
};
8080

81-
cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_eraseCmd =
81+
const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_eraseCmd =
8282
{
8383
/* The 8-bit command. 1 x I/O read command. */
8484
.command = 0xD8U,
@@ -96,7 +96,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_eraseCmd =
9696
.dataWidth = CY_SMIF_WIDTH_SINGLE
9797
};
9898

99-
cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_chipEraseCmd =
99+
const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_chipEraseCmd =
100100
{
101101
/* The 8-bit command. 1 x I/O read command. */
102102
.command = 0x60U,
@@ -114,7 +114,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_chipEraseCmd =
114114
.dataWidth = CY_SMIF_WIDTH_SINGLE
115115
};
116116

117-
cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_programCmd =
117+
const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_programCmd =
118118
{
119119
/* The 8-bit command. 1 x I/O read command. */
120120
.command = 0x38U,
@@ -132,7 +132,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_programCmd =
132132
.dataWidth = CY_SMIF_WIDTH_QUAD
133133
};
134134

135-
cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegQeCmd =
135+
const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegQeCmd =
136136
{
137137
/* The 8-bit command. 1 x I/O read command. */
138138
.command = 0x35U,
@@ -150,7 +150,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegQeCmd =
150150
.dataWidth = CY_SMIF_WIDTH_SINGLE
151151
};
152152

153-
cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegWipCmd =
153+
const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegWipCmd =
154154
{
155155
/* The 8-bit command. 1 x I/O read command. */
156156
.command = 0x05U,
@@ -168,7 +168,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegWipCmd =
168168
.dataWidth = CY_SMIF_WIDTH_SINGLE
169169
};
170170

171-
cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeStsRegQeCmd =
171+
const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeStsRegQeCmd =
172172
{
173173
/* The 8-bit command. 1 x I/O read command. */
174174
.command = 0x01U,
@@ -186,34 +186,34 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeStsRegQeCmd =
186186
.dataWidth = CY_SMIF_WIDTH_SINGLE
187187
};
188188

189-
cy_stc_smif_mem_device_cfg_t deviceCfg_S25FL512S_SlaveSlot_0 =
189+
const cy_stc_smif_mem_device_cfg_t deviceCfg_S25FL512S_SlaveSlot_0 =
190190
{
191191
/* Specifies the number of address bytes used by the memory slave device. */
192192
.numOfAddrBytes = 0x03U,
193193
/* The size of the memory. */
194194
.memSize = 0x04000000U,
195195
/* Specifies the Read command. */
196-
.readCmd = &S25FL512S_SlaveSlot_0_readCmd,
196+
.readCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_readCmd,
197197
/* Specifies the Write Enable command. */
198-
.writeEnCmd = &S25FL512S_SlaveSlot_0_writeEnCmd,
198+
.writeEnCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_writeEnCmd,
199199
/* Specifies the Write Disable command. */
200-
.writeDisCmd = &S25FL512S_SlaveSlot_0_writeDisCmd,
200+
.writeDisCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_writeDisCmd,
201201
/* Specifies the Erase command. */
202-
.eraseCmd = &S25FL512S_SlaveSlot_0_eraseCmd,
202+
.eraseCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_eraseCmd,
203203
/* Specifies the sector size of each erase. */
204204
.eraseSize = 0x00040000U,
205205
/* Specifies the Chip Erase command. */
206-
.chipEraseCmd = &S25FL512S_SlaveSlot_0_chipEraseCmd,
206+
.chipEraseCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_chipEraseCmd,
207207
/* Specifies the Program command. */
208-
.programCmd = &S25FL512S_SlaveSlot_0_programCmd,
208+
.programCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_programCmd,
209209
/* Specifies the page size for programming. */
210210
.programSize = 0x00000200U,
211211
/* Specifies the command to read the QE-containing status register. */
212-
.readStsRegQeCmd = &S25FL512S_SlaveSlot_0_readStsRegQeCmd,
212+
.readStsRegQeCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_readStsRegQeCmd,
213213
/* Specifies the command to read the WIP-containing status register. */
214-
.readStsRegWipCmd = &S25FL512S_SlaveSlot_0_readStsRegWipCmd,
214+
.readStsRegWipCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_readStsRegWipCmd,
215215
/* Specifies the command to write into the QE-containing status register. */
216-
.writeStsRegQeCmd = &S25FL512S_SlaveSlot_0_writeStsRegQeCmd,
216+
.writeStsRegQeCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_writeStsRegQeCmd,
217217
/* The mask for the status register. */
218218
.stsRegBusyMask = 0x01U,
219219
/* The mask for the status register. */
@@ -231,23 +231,23 @@ const cy_stc_smif_mem_config_t S25FL512S_SlaveSlot_0 =
231231
/* Determines the slot number where the memory device is placed. */
232232
.slaveSelect = CY_SMIF_SLAVE_SELECT_0,
233233
/* Flags. */
234-
.flags = CY_SMIF_FLAG_WR_EN,
234+
.flags = CY_SMIF_FLAG_MEMORY_MAPPED | CY_SMIF_FLAG_WR_EN,
235235
/* The data-line selection options for a slave device. */
236236
.dataSelect = CY_SMIF_DATA_SEL0,
237237
/* The base address the memory slave is mapped to in the PSoC memory map.
238238
Valid when the memory-mapped mode is enabled. */
239239
.baseAddress = 0x18000000U,
240240
/* The size allocated in the PSoC memory map, for the memory slave device.
241241
The size is allocated from the base address. Valid when the memory mapped mode is enabled. */
242-
.memMappedSize = 0x10000U,
242+
.memMappedSize = 0x40000U,
243243
/* If this memory device is one of the devices in the dual quad SPI configuration.
244244
Valid when the memory mapped mode is enabled. */
245245
.dualQuadSlots = 0,
246246
/* The configuration of the device. */
247-
.deviceCfg = &deviceCfg_S25FL512S_SlaveSlot_0
247+
.deviceCfg = (cy_stc_smif_mem_device_cfg_t*)&deviceCfg_S25FL512S_SlaveSlot_0
248248
};
249249

250-
const cy_stc_smif_mem_config_t* smifMemConfigs[] = {
250+
const cy_stc_smif_mem_config_t* const smifMemConfigs[] = {
251251
&S25FL512S_SlaveSlot_0
252252
};
253253

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/GeneratedSource/cycfg_qspi_memslot.h

Lines changed: 81 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -22,26 +22,96 @@
2222
* limitations under the License.
2323
********************************************************************************/
2424

25+
/*******************************************************************************
26+
27+
QSPI_CONFIG_START
28+
29+
<CySMIFConfiguration>
30+
<DevicePath>PSoC 6.xml</DevicePath>
31+
<SlotConfigs>
32+
<SlotConfig>
33+
<SlaveSlot>0</SlaveSlot>
34+
<PartNumber>S25FL512S</PartNumber>
35+
<MemoryMapped>true</MemoryMapped>
36+
<DualQuad>None</DualQuad>
37+
<StartAddress>0x18000000</StartAddress>
38+
<Size>0x40000</Size>
39+
<EndAddress>0x1803FFFF</EndAddress>
40+
<WriteEnable>true</WriteEnable>
41+
<Encrypt>false</Encrypt>
42+
<DataSelect>QUAD_SPI_DATA_0_3</DataSelect>
43+
<MemoryConfigsPath>S25FL512S</MemoryConfigsPath>
44+
<ConfigDataInFlash>true</ConfigDataInFlash>
45+
</SlotConfig>
46+
<SlotConfig>
47+
<SlaveSlot>1</SlaveSlot>
48+
<PartNumber>Not used</PartNumber>
49+
<MemoryMapped>false</MemoryMapped>
50+
<DualQuad>None</DualQuad>
51+
<StartAddress>0x18010000</StartAddress>
52+
<Size>0x10000</Size>
53+
<EndAddress>0x1801FFFF</EndAddress>
54+
<WriteEnable>false</WriteEnable>
55+
<Encrypt>false</Encrypt>
56+
<DataSelect>SPI_MOSI_MISO_DATA_0_1</DataSelect>
57+
<MemoryConfigsPath>default_memory.xml</MemoryConfigsPath>
58+
<ConfigDataInFlash>false</ConfigDataInFlash>
59+
</SlotConfig>
60+
<SlotConfig>
61+
<SlaveSlot>2</SlaveSlot>
62+
<PartNumber>Not used</PartNumber>
63+
<MemoryMapped>false</MemoryMapped>
64+
<DualQuad>None</DualQuad>
65+
<StartAddress>0x18020000</StartAddress>
66+
<Size>0x10000</Size>
67+
<EndAddress>0x1802FFFF</EndAddress>
68+
<WriteEnable>false</WriteEnable>
69+
<Encrypt>false</Encrypt>
70+
<DataSelect>SPI_MOSI_MISO_DATA_0_1</DataSelect>
71+
<MemoryConfigsPath>default_memory.xml</MemoryConfigsPath>
72+
<ConfigDataInFlash>false</ConfigDataInFlash>
73+
</SlotConfig>
74+
<SlotConfig>
75+
<SlaveSlot>3</SlaveSlot>
76+
<PartNumber>Not used</PartNumber>
77+
<MemoryMapped>false</MemoryMapped>
78+
<DualQuad>None</DualQuad>
79+
<StartAddress>0x18030000</StartAddress>
80+
<Size>0x10000</Size>
81+
<EndAddress>0x1803FFFF</EndAddress>
82+
<WriteEnable>false</WriteEnable>
83+
<Encrypt>false</Encrypt>
84+
<DataSelect>SPI_MOSI_MISO_DATA_0_1</DataSelect>
85+
<MemoryConfigsPath>default_memory.xml</MemoryConfigsPath>
86+
<ConfigDataInFlash>false</ConfigDataInFlash>
87+
</SlotConfig>
88+
</SlotConfigs>
89+
</CySMIFConfiguration>
90+
91+
QSPI_CONFIG_END
92+
93+
*******************************************************************************/
94+
2595
#ifndef CYCFG_QSPI_MEMSLOT_H
2696
#define CYCFG_QSPI_MEMSLOT_H
2797
#include "cy_smif_memslot.h"
2898

2999
#define CY_SMIF_DEVICE_NUM 1
30100

31-
extern cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readCmd;
32-
extern cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeEnCmd;
33-
extern cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeDisCmd;
34-
extern cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_eraseCmd;
35-
extern cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_chipEraseCmd;
36-
extern cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_programCmd;
37-
extern cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegQeCmd;
38-
extern cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegWipCmd;
39-
extern cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeStsRegQeCmd;
101+
extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readCmd;
102+
extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeEnCmd;
103+
extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeDisCmd;
104+
extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_eraseCmd;
105+
extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_chipEraseCmd;
106+
extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_programCmd;
107+
extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegQeCmd;
108+
extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegWipCmd;
109+
extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeStsRegQeCmd;
40110

41-
extern cy_stc_smif_mem_device_cfg_t deviceCfg_S25FL512S_SlaveSlot_0;
111+
extern const cy_stc_smif_mem_device_cfg_t deviceCfg_S25FL512S_SlaveSlot_0;
42112

43113
extern const cy_stc_smif_mem_config_t S25FL512S_SlaveSlot_0;
44-
extern const cy_stc_smif_mem_config_t* smifMemConfigs[CY_SMIF_DEVICE_NUM];
114+
extern const cy_stc_smif_mem_config_t* const smifMemConfigs[CY_SMIF_DEVICE_NUM];
45115

46116
extern const cy_stc_smif_block_config_t smifBlockConfig;
47117

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/TARGET_MCU_PSOC6_M4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld

Lines changed: 23 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -174,6 +174,21 @@ SECTIONS
174174
} > flash
175175

176176
/* Cortex-M4 application image */
177+
/* Places the code in the Execute in Place (XIP) section. See the smif driver
178+
* documentation for details.
179+
*/
180+
.cy_xip :
181+
{
182+
. = ALIGN(4);
183+
__cy_xip_start__ = .;
184+
KEEP(*(.cy_xip))
185+
#if XIP_ENABLE == 1
186+
*lwipstack*.o (.text .text* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
187+
*mbed-cloud-client*.o (.text .text* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
188+
#endif
189+
__cy_xip_end__ = .;
190+
} > xip
191+
177192
.text FLASH_CM4_START :
178193
{
179194
. = ALIGN(4);
@@ -185,7 +200,11 @@ SECTIONS
185200
__end__ = .;
186201

187202
. = ALIGN(4);
203+
#if XIP_ENABLE == 1
204+
*(EXCLUDE_FILE(*lwipstack*.o *mbed-cloud-client*.o) .text .text*)
205+
#else
188206
*(.text*)
207+
#endif
189208

190209
KEEP(*(.init))
191210
KEEP(*(.fini))
@@ -205,7 +224,11 @@ SECTIONS
205224
*(.dtors)
206225

207226
/* Read-only code (constants). */
227+
#if XIP_ENABLE == 1
228+
*(EXCLUDE_FILE(*lwipstack*.o *mbed-cloud-client*.o) .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
229+
#else
208230
*(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
231+
#endif
209232

210233
KEEP(*(.eh_frame*))
211234
} > flash
@@ -412,15 +435,6 @@ SECTIONS
412435
} > sflash_rtoc_2
413436

414437

415-
/* Places the code in the Execute in Place (XIP) section. See the smif driver
416-
* documentation for details.
417-
*/
418-
.cy_xip :
419-
{
420-
KEEP(*(.cy_xip))
421-
} > xip
422-
423-
424438
/* eFuse */
425439
.cy_efuse :
426440
{

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/TARGET_MCU_PSOC6_M4/TOOLCHAIN_GCC_ARM/startup_psoc6_01_cm4.S

Lines changed: 0 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -53,23 +53,6 @@ __StackLimit:
5353
__StackTop:
5454
.size __StackTop, . - __StackTop
5555

56-
.section .heap
57-
.align 3
58-
#ifdef __HEAP_SIZE
59-
.equ Heap_Size, __HEAP_SIZE
60-
#else
61-
.equ Heap_Size, 0x00000400
62-
#endif
63-
.globl __HeapBase
64-
.globl __HeapLimit
65-
__HeapBase:
66-
.if Heap_Size
67-
.space Heap_Size
68-
.endif
69-
.size __HeapBase, . - __HeapBase
70-
__HeapLimit:
71-
.size __HeapLimit, . - __HeapLimit
72-
7356
.section .vectors
7457
.align 2
7558
.globl __Vectors

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