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#include "cycfg_qspi_memslot.h"
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- cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readCmd =
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+ const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readCmd =
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{
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/* The 8-bit command. 1 x I/O read command. */
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.command = 0xEBU ,
@@ -42,7 +42,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readCmd =
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.dataWidth = CY_SMIF_WIDTH_QUAD
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};
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- cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeEnCmd =
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+ const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeEnCmd =
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{
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/* The 8-bit command. 1 x I/O read command. */
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.command = 0x06U ,
@@ -60,7 +60,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeEnCmd =
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.dataWidth = CY_SMIF_WIDTH_SINGLE
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};
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- cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeDisCmd =
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+ const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeDisCmd =
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{
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/* The 8-bit command. 1 x I/O read command. */
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.command = 0x04U ,
@@ -78,7 +78,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeDisCmd =
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.dataWidth = CY_SMIF_WIDTH_SINGLE
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};
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- cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_eraseCmd =
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+ const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_eraseCmd =
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{
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/* The 8-bit command. 1 x I/O read command. */
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.command = 0xD8U ,
@@ -96,7 +96,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_eraseCmd =
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.dataWidth = CY_SMIF_WIDTH_SINGLE
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};
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- cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_chipEraseCmd =
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+ const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_chipEraseCmd =
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{
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/* The 8-bit command. 1 x I/O read command. */
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.command = 0x60U ,
@@ -114,7 +114,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_chipEraseCmd =
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.dataWidth = CY_SMIF_WIDTH_SINGLE
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};
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- cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_programCmd =
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+ const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_programCmd =
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{
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/* The 8-bit command. 1 x I/O read command. */
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.command = 0x38U ,
@@ -132,7 +132,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_programCmd =
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.dataWidth = CY_SMIF_WIDTH_QUAD
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};
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- cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegQeCmd =
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+ const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegQeCmd =
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{
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/* The 8-bit command. 1 x I/O read command. */
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.command = 0x35U ,
@@ -150,7 +150,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegQeCmd =
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.dataWidth = CY_SMIF_WIDTH_SINGLE
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};
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- cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegWipCmd =
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+ const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegWipCmd =
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{
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/* The 8-bit command. 1 x I/O read command. */
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.command = 0x05U ,
@@ -168,7 +168,7 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegWipCmd =
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.dataWidth = CY_SMIF_WIDTH_SINGLE
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};
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- cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeStsRegQeCmd =
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+ const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeStsRegQeCmd =
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{
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/* The 8-bit command. 1 x I/O read command. */
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.command = 0x01U ,
@@ -186,34 +186,34 @@ cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeStsRegQeCmd =
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.dataWidth = CY_SMIF_WIDTH_SINGLE
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};
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- cy_stc_smif_mem_device_cfg_t deviceCfg_S25FL512S_SlaveSlot_0 =
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+ const cy_stc_smif_mem_device_cfg_t deviceCfg_S25FL512S_SlaveSlot_0 =
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{
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/* Specifies the number of address bytes used by the memory slave device. */
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.numOfAddrBytes = 0x03U ,
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/* The size of the memory. */
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.memSize = 0x04000000U ,
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/* Specifies the Read command. */
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- .readCmd = & S25FL512S_SlaveSlot_0_readCmd ,
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+ .readCmd = ( cy_stc_smif_mem_cmd_t * ) & S25FL512S_SlaveSlot_0_readCmd ,
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/* Specifies the Write Enable command. */
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- .writeEnCmd = & S25FL512S_SlaveSlot_0_writeEnCmd ,
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+ .writeEnCmd = ( cy_stc_smif_mem_cmd_t * ) & S25FL512S_SlaveSlot_0_writeEnCmd ,
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/* Specifies the Write Disable command. */
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- .writeDisCmd = & S25FL512S_SlaveSlot_0_writeDisCmd ,
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+ .writeDisCmd = ( cy_stc_smif_mem_cmd_t * ) & S25FL512S_SlaveSlot_0_writeDisCmd ,
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/* Specifies the Erase command. */
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- .eraseCmd = & S25FL512S_SlaveSlot_0_eraseCmd ,
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+ .eraseCmd = ( cy_stc_smif_mem_cmd_t * ) & S25FL512S_SlaveSlot_0_eraseCmd ,
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/* Specifies the sector size of each erase. */
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.eraseSize = 0x00040000U ,
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/* Specifies the Chip Erase command. */
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- .chipEraseCmd = & S25FL512S_SlaveSlot_0_chipEraseCmd ,
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+ .chipEraseCmd = ( cy_stc_smif_mem_cmd_t * ) & S25FL512S_SlaveSlot_0_chipEraseCmd ,
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/* Specifies the Program command. */
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- .programCmd = & S25FL512S_SlaveSlot_0_programCmd ,
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+ .programCmd = ( cy_stc_smif_mem_cmd_t * ) & S25FL512S_SlaveSlot_0_programCmd ,
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/* Specifies the page size for programming. */
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.programSize = 0x00000200U ,
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/* Specifies the command to read the QE-containing status register. */
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- .readStsRegQeCmd = & S25FL512S_SlaveSlot_0_readStsRegQeCmd ,
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+ .readStsRegQeCmd = ( cy_stc_smif_mem_cmd_t * ) & S25FL512S_SlaveSlot_0_readStsRegQeCmd ,
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/* Specifies the command to read the WIP-containing status register. */
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- .readStsRegWipCmd = & S25FL512S_SlaveSlot_0_readStsRegWipCmd ,
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+ .readStsRegWipCmd = ( cy_stc_smif_mem_cmd_t * ) & S25FL512S_SlaveSlot_0_readStsRegWipCmd ,
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/* Specifies the command to write into the QE-containing status register. */
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- .writeStsRegQeCmd = & S25FL512S_SlaveSlot_0_writeStsRegQeCmd ,
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+ .writeStsRegQeCmd = ( cy_stc_smif_mem_cmd_t * ) & S25FL512S_SlaveSlot_0_writeStsRegQeCmd ,
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/* The mask for the status register. */
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.stsRegBusyMask = 0x01U ,
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/* The mask for the status register. */
@@ -231,23 +231,23 @@ const cy_stc_smif_mem_config_t S25FL512S_SlaveSlot_0 =
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/* Determines the slot number where the memory device is placed. */
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.slaveSelect = CY_SMIF_SLAVE_SELECT_0 ,
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/* Flags. */
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- .flags = CY_SMIF_FLAG_WR_EN ,
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+ .flags = CY_SMIF_FLAG_MEMORY_MAPPED | CY_SMIF_FLAG_WR_EN ,
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/* The data-line selection options for a slave device. */
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.dataSelect = CY_SMIF_DATA_SEL0 ,
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/* The base address the memory slave is mapped to in the PSoC memory map.
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Valid when the memory-mapped mode is enabled. */
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.baseAddress = 0x18000000U ,
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/* The size allocated in the PSoC memory map, for the memory slave device.
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The size is allocated from the base address. Valid when the memory mapped mode is enabled. */
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- .memMappedSize = 0x10000U ,
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+ .memMappedSize = 0x40000U ,
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/* If this memory device is one of the devices in the dual quad SPI configuration.
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Valid when the memory mapped mode is enabled. */
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.dualQuadSlots = 0 ,
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/* The configuration of the device. */
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- .deviceCfg = & deviceCfg_S25FL512S_SlaveSlot_0
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+ .deviceCfg = ( cy_stc_smif_mem_device_cfg_t * ) & deviceCfg_S25FL512S_SlaveSlot_0
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};
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- const cy_stc_smif_mem_config_t * smifMemConfigs [] = {
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+ const cy_stc_smif_mem_config_t * const smifMemConfigs [] = {
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& S25FL512S_SlaveSlot_0
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};
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