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Merge pull request #2728 from andreaslarssonublox/eth_fix
Added ethernet and enabled IPV4 feature for the EVK-ODIN-W2/C029 target
2 parents aad2372 + 7661fe5 commit 29b0551

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#include <string.h>
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#include "stm32f4xx_hal.h"
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#include "toolchain.h"
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#define C029_OTP_START_ADDRESS (0x1FFF7800U)
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#define C029_OTP_END_ADDRESS (C029_OTP_START_ADDRESS + (16*32))
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#define C029_MAC_ETHERNET_ID (3)
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typedef MBED_PACKED(struct) C029_OTP_Header {
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uint8_t id;
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uint8_t len;
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uint8_t data[];
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} C029_OTP_Header;
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static int _macRetrieved = 0;
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static char _macAddr[6] = { 0x02, 0x02, 0xF7, 0xF0, 0x00, 0x00 };
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static C029_OTP_Header *increment(C029_OTP_Header *pTemp)
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{
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uint8_t len = 0;
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uint8_t id = 0;
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uint8_t *p = (uint8_t*)pTemp;
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memcpy((void*)&id, (void*)pTemp, 1);
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if (id == 0xFF){
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p++;
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}
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else {
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p++;
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memcpy((void*)&len, (void*)p++, 1);
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p += len;
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}
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return (C029_OTP_Header*)p;
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}
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/**
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* Override HAL Eth Init function
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*/
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void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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if (heth->Instance == ETH) {
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/* Enable GPIOs clocks */
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__HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPIOB_CLK_ENABLE();
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__HAL_RCC_GPIOC_CLK_ENABLE();
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/** ETH GPIO Configuration
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RMII_REF_CLK ----------------------> PA1
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RMII_MDIO -------------------------> PA2
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RMII_MDC --------------------------> PC1
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RMII_MII_CRS_DV -------------------> PA7
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RMII_MII_RXD0 ---------------------> PC4
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RMII_MII_RXD1 ---------------------> PC5
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RMII_MII_RXER ---------------------> PG2
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RMII_MII_TX_EN --------------------> PB11
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RMII_MII_TXD0 ---------------------> PB12
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RMII_MII_TXD1 ---------------------> PB13
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*/
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/* Configure PA1, PA2 and PA7 */
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GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
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GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStructure.Pull = GPIO_PULLUP;
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GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_7;
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GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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GPIO_InitStructure.Pin = GPIO_PIN_1;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
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/* Configure PB13 */
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GPIO_InitStructure.Pin = GPIO_PIN_13 | GPIO_PIN_11 | GPIO_PIN_12;
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HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
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/* Configure PC1, PC4 and PC5 */
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GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
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/* Enable the Ethernet global Interrupt */
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HAL_NVIC_SetPriority(ETH_IRQn, 0x7, 0);
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HAL_NVIC_EnableIRQ(ETH_IRQn);
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/* Enable ETHERNET clock */
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__HAL_RCC_ETH_CLK_ENABLE();
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}
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}
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/**
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* Override HAL Eth DeInit function
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*/
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void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
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{
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if (heth->Instance == ETH) {
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/* Peripheral clock disable */
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__HAL_RCC_ETH_CLK_DISABLE();
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/** ETH GPIO Configuration
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RMII_REF_CLK ----------------------> PA1
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RMII_MDIO -------------------------> PA2
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RMII_MDC --------------------------> PC1
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RMII_MII_CRS_DV -------------------> PA7
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RMII_MII_RXD0 ---------------------> PC4
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RMII_MII_RXD1 ---------------------> PC5
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RMII_MII_RXER ---------------------> PG2
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RMII_MII_TX_EN --------------------> PB11
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RMII_MII_TXD0 ---------------------> PB12
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RMII_MII_TXD1 ---------------------> PB13
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*/
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HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
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HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13 | GPIO_PIN_11 | GPIO_PIN_12);
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HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
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/* Disable the Ethernet global Interrupt */
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NVIC_DisableIRQ(ETH_IRQn);
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}
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}
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void mbed_mac_address(char *mac)
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{
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C029_OTP_Header *pFound = NULL;
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C029_OTP_Header *pTemp = (C029_OTP_Header*)C029_OTP_START_ADDRESS;
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C029_OTP_Header temp;
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if (_macRetrieved == 0) {
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while ((pTemp >= (C029_OTP_Header*)C029_OTP_START_ADDRESS) && (pTemp < (C029_OTP_Header*)C029_OTP_END_ADDRESS)){
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memcpy((void*)&temp, (void*)pTemp, sizeof(temp));
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if (temp.id == C029_MAC_ETHERNET_ID){
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pFound = pTemp;
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break;
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}
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pTemp = increment(pTemp);
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}
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if (pFound != NULL) {
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memcpy(_macAddr, pFound->data, 6);
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_macRetrieved = 1;
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}
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}
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memcpy(mac, _macAddr, 6);
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}

hal/targets.json

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"macros": ["HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED"],
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"inherits": ["Target"],
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"device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
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"features": ["IPV4"],
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"release_versions": ["5"]
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},
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"NZ32_SC151": {

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