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Merge pull request #5792 from jeromecoutant/PULL_REQUEST_CUBE_UPDATE_F0_V1.9.0
STM32F0 : ST CUBE version update to V1.9.0
2 parents f10e663 + 9f4bec2 commit 2c5fedc

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‎targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f051x8.S

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,6 @@
11
;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
22
;* File Name : startup_stm32f051x8.s
33
;* Author : MCD Application Team
4-
;* Version : V2.2.2
5-
;* Date : 26-June-2015
64
;* Description : STM32F051x4/STM32F051x6/STM32F051x8 devices vector table for MDK-ARM toolchain.
75
;* This module performs:
86
;* - Set the initial SP

‎targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_ARM_STD/startup_stm32f051x8.S

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@@ -1,8 +1,6 @@
11
;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
22
;* File Name : startup_stm32f051x8.s
33
;* Author : MCD Application Team
4-
;* Version : V2.2.2
5-
;* Date : 26-June-2015
64
;* Description : STM32F051x4/STM32F051x6/STM32F051x8 devices vector table for MDK-ARM toolchain.
75
;* This module performs:
86
;* - Set the initial SP

‎targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_GCC_ARM/startup_stm32f051x8.S

Lines changed: 28 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -2,9 +2,7 @@
22
******************************************************************************
33
* @file startup_stm32f051x8.s
44
* @author MCD Application Team
5-
* @version V2.1.0
6-
* @date 03-Oct-2014
7-
* @brief STM32F051x4/STM32F051x6/STM32F051x8 devices vector table for Atollic TrueSTUDIO toolchain.
5+
* @brief STM32F051x4/STM32F051x6/STM32F051x8 devices vector table for GCC toolchain.
86
* This module performs:
97
* - Set the initial SP
108
* - Set the initial PC == Reset_Handler,
@@ -55,6 +53,10 @@ defined in linker script */
5553
.word _sdata
5654
/* end address for the .data section. defined in linker script */
5755
.word _edata
56+
/* start address for the .bss section. defined in linker script */
57+
.word _sbss
58+
/* end address for the .bss section. defined in linker script */
59+
.word _ebss
5860

5961
.section .text.Reset_Handler
6062
.weak Reset_Handler
@@ -64,21 +66,35 @@ Reset_Handler:
6466
mov sp, r0 /* set stack pointer */
6567

6668
/* Copy the data segment initializers from flash to SRAM */
67-
movs r1, #0
69+
ldr r0, =_sdata
70+
ldr r1, =_edata
71+
ldr r2, =_sidata
72+
movs r3, #0
6873
b LoopCopyDataInit
6974

7075
CopyDataInit:
71-
ldr r3, =_sidata
72-
ldr r3, [r3, r1]
73-
str r3, [r0, r1]
74-
adds r1, r1, #4
76+
ldr r4, [r2, r3]
77+
str r4, [r0, r3]
78+
adds r3, r3, #4
7579

7680
LoopCopyDataInit:
77-
ldr r0, =_sdata
78-
ldr r3, =_edata
79-
adds r2, r0, r1
80-
cmp r2, r3
81+
adds r4, r0, r3
82+
cmp r4, r1
8183
bcc CopyDataInit
84+
85+
/* Zero fill the bss segment. */
86+
ldr r2, =_sbss
87+
ldr r4, =_ebss
88+
movs r3, #0
89+
b LoopFillZerobss
90+
91+
FillZerobss:
92+
str r3, [r2]
93+
adds r2, r2, #4
94+
95+
LoopFillZerobss:
96+
cmp r2, r4
97+
bcc FillZerobss
8298

8399
/* Call the clock system intitialization function.*/
84100
bl SystemInit

‎targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/hal_tick.h

Lines changed: 3 additions & 3 deletions
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@@ -46,11 +46,11 @@
4646
#define TIM_MST TIM1
4747
#define TIM_MST_UP_IRQ TIM1_BRK_UP_TRG_COM_IRQn
4848
#define TIM_MST_OC_IRQ TIM1_CC_IRQn
49-
#define TIM_MST_RCC __TIM1_CLK_ENABLE()
49+
#define TIM_MST_RCC __HAL_RCC_TIM1_CLK_ENABLE()
5050
#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM1()
5151

52-
#define TIM_MST_RESET_ON __TIM1_FORCE_RESET()
53-
#define TIM_MST_RESET_OFF __TIM1_RELEASE_RESET()
52+
#define TIM_MST_RESET_ON __HAL_RCC_TIM1_FORCE_RESET()
53+
#define TIM_MST_RESET_OFF __HAL_RCC_TIM1_RELEASE_RESET()
5454

5555
#define TIM_MST_16BIT 1 // 1=16-bit timer, 0=32-bit timer
5656

‎targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/stm32f051x8.h

Lines changed: 141 additions & 83 deletions
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‎targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/stm32f0xx.h

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32f0xx.h
44
* @author MCD Application Team
5-
* @version V2.3.1
6-
* @date 04-November-2016
75
* @brief CMSIS STM32F0xx Device Peripheral Access Layer Header File.
86
*
97
* The file is the unique include file that the application programmer
@@ -112,11 +110,11 @@
112110
#endif /* USE_HAL_DRIVER */
113111

114112
/**
115-
* @brief CMSIS Device version number V2.3.1
113+
* @brief CMSIS Device version number V2.3.3
116114
*/
117115
#define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
118116
#define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
119-
#define __STM32F0_DEVICE_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
117+
#define __STM32F0_DEVICE_VERSION_SUB2 (0x03) /*!< [15:8] sub2 version */
120118
#define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
121119
#define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
122120
|(__STM32F0_DEVICE_VERSION_SUB1 << 16)\

‎targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/system_clock.c

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Original file line numberDiff line numberDiff line change
@@ -212,7 +212,6 @@ uint8_t SetSysClock_PLL_HSI(void)
212212
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
213213
RCC_OscInitStruct.HSI14State = RCC_HSI_OFF;
214214
RCC_OscInitStruct.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT;
215-
RCC_OscInitStruct.HSI48State = RCC_HSI_ON;
216215
RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
217216
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
218217
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2

‎targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/system_stm32f0xx.h

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@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file system_stm32f0xx.h
44
* @author MCD Application Team
5-
* @version V2.3.1
6-
* @date 04-November-2016
75
* @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.
86
******************************************************************************
97
* @attention

‎targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f030x8.S

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,7 @@ __Vectors DCD __initial_sp ; Top of Stack
101101
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
102102
DCD 0 ; Reserved
103103
DCD TIM3_IRQHandler ; TIM3
104-
DCD 0 ; Reserved
104+
DCD TIM6_IRQHandler ; TIM6
105105
DCD 0 ; Reserved
106106
DCD TIM14_IRQHandler ; TIM14
107107
DCD TIM15_IRQHandler ; TIM15
@@ -120,7 +120,7 @@ __Vectors_Size EQU __Vectors_End - __Vectors
120120

121121
AREA |.text|, CODE, READONLY
122122

123-
; Reset handler
123+
; Reset handler routine
124124
Reset_Handler PROC
125125
EXPORT Reset_Handler [WEAK]
126126
IMPORT __main
@@ -171,6 +171,7 @@ Default_Handler PROC
171171
EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
172172
EXPORT TIM1_CC_IRQHandler [WEAK]
173173
EXPORT TIM3_IRQHandler [WEAK]
174+
EXPORT TIM6_IRQHandler [WEAK]
174175
EXPORT TIM14_IRQHandler [WEAK]
175176
EXPORT TIM15_IRQHandler [WEAK]
176177
EXPORT TIM16_IRQHandler [WEAK]
@@ -197,6 +198,7 @@ ADC1_IRQHandler
197198
TIM1_BRK_UP_TRG_COM_IRQHandler
198199
TIM1_CC_IRQHandler
199200
TIM3_IRQHandler
201+
TIM6_IRQHandler
200202
TIM14_IRQHandler
201203
TIM15_IRQHandler
202204
TIM16_IRQHandler

‎targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_ARM_STD/startup_stm32f030x8.S

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -74,7 +74,7 @@ __Vectors DCD __initial_sp ; Top of Stack
7474
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
7575
DCD 0 ; Reserved
7676
DCD TIM3_IRQHandler ; TIM3
77-
DCD 0 ; Reserved
77+
DCD TIM6_IRQHandler ; TIM6
7878
DCD 0 ; Reserved
7979
DCD TIM14_IRQHandler ; TIM14
8080
DCD TIM15_IRQHandler ; TIM15
@@ -93,7 +93,7 @@ __Vectors_Size EQU __Vectors_End - __Vectors
9393

9494
AREA |.text|, CODE, READONLY
9595

96-
; Reset handler
96+
; Reset handler routine
9797
Reset_Handler PROC
9898
EXPORT Reset_Handler [WEAK]
9999
IMPORT __main
@@ -144,6 +144,7 @@ Default_Handler PROC
144144
EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
145145
EXPORT TIM1_CC_IRQHandler [WEAK]
146146
EXPORT TIM3_IRQHandler [WEAK]
147+
EXPORT TIM6_IRQHandler [WEAK]
147148
EXPORT TIM14_IRQHandler [WEAK]
148149
EXPORT TIM15_IRQHandler [WEAK]
149150
EXPORT TIM16_IRQHandler [WEAK]
@@ -170,6 +171,7 @@ ADC1_IRQHandler
170171
TIM1_BRK_UP_TRG_COM_IRQHandler
171172
TIM1_CC_IRQHandler
172173
TIM3_IRQHandler
174+
TIM6_IRQHandler
173175
TIM14_IRQHandler
174176
TIM15_IRQHandler
175177
TIM16_IRQHandler

‎targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_GCC_ARM/startup_stm32f030x8.S

Lines changed: 28 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -2,9 +2,7 @@
22
******************************************************************************
33
* @file startup_stm32f030x8.s
44
* @author MCD Application Team
5-
* @version V2.1.0
6-
* @date 03-Oct-2014
7-
* @brief STM32F030x8 devices vector table for Atollic TrueSTUDIO toolchain.
5+
* @brief STM32F030x8 devices vector table for GCC toolchain.
86
* This module performs:
97
* - Set the initial SP
108
* - Set the initial PC == Reset_Handler,
@@ -55,6 +53,10 @@ defined in linker script */
5553
.word _sdata
5654
/* end address for the .data section. defined in linker script */
5755
.word _edata
56+
/* start address for the .bss section. defined in linker script */
57+
.word _sbss
58+
/* end address for the .bss section. defined in linker script */
59+
.word _ebss
5860

5961
.section .text.Reset_Handler
6062
.weak Reset_Handler
@@ -64,21 +66,35 @@ Reset_Handler:
6466
mov sp, r0 /* set stack pointer */
6567

6668
/* Copy the data segment initializers from flash to SRAM */
67-
movs r1, #0
69+
ldr r0, =_sdata
70+
ldr r1, =_edata
71+
ldr r2, =_sidata
72+
movs r3, #0
6873
b LoopCopyDataInit
6974

7075
CopyDataInit:
71-
ldr r3, =_sidata
72-
ldr r3, [r3, r1]
73-
str r3, [r0, r1]
74-
adds r1, r1, #4
76+
ldr r4, [r2, r3]
77+
str r4, [r0, r3]
78+
adds r3, r3, #4
7579

7680
LoopCopyDataInit:
77-
ldr r0, =_sdata
78-
ldr r3, =_edata
79-
adds r2, r0, r1
80-
cmp r2, r3
81+
adds r4, r0, r3
82+
cmp r4, r1
8183
bcc CopyDataInit
84+
85+
/* Zero fill the bss segment. */
86+
ldr r2, =_sbss
87+
ldr r4, =_ebss
88+
movs r3, #0
89+
b LoopFillZerobss
90+
91+
FillZerobss:
92+
str r3, [r2]
93+
adds r2, r2, #4
94+
95+
LoopFillZerobss:
96+
cmp r2, r4
97+
bcc FillZerobss
8298

8399
/* Call the clock system intitialization function.*/
84100
bl SystemInit

‎targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_IAR/startup_stm32f030x8.S

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,6 @@
11
;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
22
;* File Name : startup_stm32f030x8.s
33
;* Author : MCD Application Team
4-
;* Version : V2.1.0
5-
;* Date : 03-Oct-2014
64
;* Description : STM32F030x8 devices vector table for EWARM toolchain.
75
;* This module performs:
86
;* - Set the initial SP
@@ -15,8 +13,6 @@
1513
;* priority is Privileged, and the Stack is set to Main.
1614
;*******************************************************************************
1715
;*
18-
;* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
19-
;*
2016
;* Redistribution and use in source and binary forms, with or without modification,
2117
;* are permitted provided that the following conditions are met:
2218
;* 1. Redistributions of source code must retain the above copyright notice,

‎targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/hal_tick.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -46,11 +46,11 @@
4646
#define TIM_MST TIM1
4747
#define TIM_MST_UP_IRQ TIM1_BRK_UP_TRG_COM_IRQn
4848
#define TIM_MST_OC_IRQ TIM1_CC_IRQn
49-
#define TIM_MST_RCC __TIM1_CLK_ENABLE()
49+
#define TIM_MST_RCC __HAL_RCC_TIM1_CLK_ENABLE()
5050
#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM1()
5151

52-
#define TIM_MST_RESET_ON __TIM1_FORCE_RESET()
53-
#define TIM_MST_RESET_OFF __TIM1_RELEASE_RESET()
52+
#define TIM_MST_RESET_ON __HAL_RCC_TIM1_FORCE_RESET()
53+
#define TIM_MST_RESET_OFF __HAL_RCC_TIM1_RELEASE_RESET()
5454

5555
#define TIM_MST_16BIT 1 // 1=16-bit timer, 0=32-bit timer
5656

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