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radhika-raghavendranradhika-raghavendran
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Formatting code according to ARM guidelines.
Ran pylint and astyle. Rebased latest ARMmbed-os code.
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lines changed

‎hal/targets.json

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2019,6 +2019,7 @@
20192019
"progen": {"target": "ncs36510"},
20202020
"progen_target": "ncs36510",
20212021
"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
2022-
"device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI"]
2022+
"device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI"],
2023+
"release_versions": ["2", "5"]
20232024
}
20242025
}

‎hal/targets/hal/TARGET_ONSEMI/TARGET_NCS36510/Pad.c

Lines changed: 41 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,7 @@
6767
*************************************************************************************************/
6868

6969
/** Find description at pad.h */
70-
void fPadInit()
70+
void fPadInit()
7171
{
7272
/** - Enable the clock for PAD peripheral device */
7373
CLOCK_ENABLE(CLOCK_PAD);
@@ -86,12 +86,12 @@ void fPadInit()
8686
PADREG->PADIO10.WORD = PAD_UNUSED_PD_L0_PP;
8787
PADREG->PADIO11.WORD = PAD_INPUT_PD_L1_PP; /* SWO */
8888
PADREG->PADIO12.WORD = PAD_INPUT_PD_L1_PP; /* SWCLK */
89-
PADREG->PADIO13.WORD = PAD_INPUT_PD_L1_PP; /* SWDIO */
90-
PADREG->PADIO14.WORD = PAD_INPUT_PD_L1_PP;
89+
PADREG->PADIO13.WORD = PAD_INPUT_PD_L1_PP; /* SWDIO */
90+
PADREG->PADIO14.WORD = PAD_INPUT_PD_L1_PP;
9191
PADREG->PADIO15.WORD = PAD_UNUSED_PD_L0_PP;
92-
PADREG->PADIO16.WORD = PAD_UNUSED_PD_L0_PP;
93-
PADREG->PADIO17.WORD = PAD_UNUSED_PD_L0_PP;
94-
92+
PADREG->PADIO16.WORD = PAD_UNUSED_PD_L0_PP;
93+
PADREG->PADIO17.WORD = PAD_UNUSED_PD_L0_PP;
94+
9595
/** - Disable the clock for PAD peripheral device */
9696
CLOCK_DISABLE(CLOCK_PAD);
9797

@@ -101,41 +101,40 @@ void fPadInit()
101101
boolean fPadIOCtrl(uint8_t PadNum, uint8_t OutputDriveStrength, uint8_t OutputDriveType, uint8_t PullType)
102102
{
103103
PadReg_t *PadRegOffset;
104-
/** \verbatim
105-
Table: O/p drive strength
106-
107-
Drive strength 3.3V (min/typ/max) 1V (min/typ/max)
108-
000 1/1.4/2.1 mA 0.043/0.07/0.11 mA
109-
001 2/2.7/4.1 mA 0.086/0.15/0.215 mA
110-
010 4.1/5.3/7.8 mA 0.188/0.3/0.4 mA
111-
011 8.1/10.4/15 8 mA 0.4/0.6/0.81 mA
112-
100 20.8/26/37 mA* 1/1.6/2.2 mA
113-
101 40.5/50/70 mA* 2/3/4.3 mA
114-
11x 57/73/102 mA* 3/4.6/6.2 mA
115-
116-
*Values are only accessible when CDBGPWRUPREQ is high. This limits the maximum output current in functional mode. \endverbatim */
117-
118-
119-
if((PadNum <= PAD_NUM_OF_IO) &&
120-
(OutputDriveStrength <= PAD_OP_DRIVE_STRGTH_MAX) &&
121-
(OutputDriveType <= PAD_OP_DRIVE_TYPE_MAX) && (PullType <= PAD_OP_PULL_TYPE_MAX))
122-
{
123-
/** - Get PAD IO register address for the PAD number */
124-
PadRegOffset = (PadReg_t*)(PADREG_BASE + (PadNum * PAD_REG_ADRS_BYTE_SIZE));
125-
126-
/** - Enable the clock for PAD peripheral device */
127-
CLOCK_ENABLE(CLOCK_PAD);
128-
129-
/** - Set drive type, pulltype & drive strength */
130-
PadRegOffset->PADIO0.WORD = (uint32_t)((PullType << PAD_OP_PULL_TYPE_BIT_POS) |
131-
(OutputDriveStrength << PAD_OP_DRIVE_STRGTH_BIT_POS) |
132-
(OutputDriveType << PAD_OP_DRIVE_TYPE_BIT_POS));
133-
134-
/** - Disable the clock for PAD peripheral device */
135-
CLOCK_DISABLE(CLOCK_PAD);
136-
return True;
137-
}
138-
/* Invalid parameter/s */
139-
return False;
104+
/** \verbatim
105+
Table: O/p drive strength
106+
107+
Drive strength 3.3V (min/typ/max) 1V (min/typ/max)
108+
000 1/1.4/2.1 mA 0.043/0.07/0.11 mA
109+
001 2/2.7/4.1 mA 0.086/0.15/0.215 mA
110+
010 4.1/5.3/7.8 mA 0.188/0.3/0.4 mA
111+
011 8.1/10.4/15 8 mA 0.4/0.6/0.81 mA
112+
100 20.8/26/37 mA* 1/1.6/2.2 mA
113+
101 40.5/50/70 mA* 2/3/4.3 mA
114+
11x 57/73/102 mA* 3/4.6/6.2 mA
115+
116+
*Values are only accessible when CDBGPWRUPREQ is high. This limits the maximum output current in functional mode. \endverbatim */
117+
118+
119+
if((PadNum <= PAD_NUM_OF_IO) &&
120+
(OutputDriveStrength <= PAD_OP_DRIVE_STRGTH_MAX) &&
121+
(OutputDriveType <= PAD_OP_DRIVE_TYPE_MAX) && (PullType <= PAD_OP_PULL_TYPE_MAX)) {
122+
/** - Get PAD IO register address for the PAD number */
123+
PadRegOffset = (PadReg_t*)(PADREG_BASE + (PadNum * PAD_REG_ADRS_BYTE_SIZE));
124+
125+
/** - Enable the clock for PAD peripheral device */
126+
CLOCK_ENABLE(CLOCK_PAD);
127+
128+
/** - Set drive type, pulltype & drive strength */
129+
PadRegOffset->PADIO0.WORD = (uint32_t)((PullType << PAD_OP_PULL_TYPE_BIT_POS) |
130+
(OutputDriveStrength << PAD_OP_DRIVE_STRGTH_BIT_POS) |
131+
(OutputDriveType << PAD_OP_DRIVE_TYPE_BIT_POS));
132+
133+
/** - Disable the clock for PAD peripheral device */
134+
CLOCK_DISABLE(CLOCK_PAD);
135+
return True;
136+
}
137+
/* Invalid parameter/s */
138+
return False;
140139
}
141140
#endif /* REVD */

‎hal/targets/hal/TARGET_ONSEMI/TARGET_NCS36510/PeripheralNames.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -26,8 +26,8 @@
2626

2727
#include "cmsis.h"
2828

29-
#include "memory_map.h" //I think this is needed because enums are using base adresses
30-
#include "PinNames.h" //this needed?
29+
#include "memory_map.h" /* This is needed because enums use base adresses */
30+
#include "PinNames.h"
3131
#ifdef __cplusplus
3232
extern "C" {
3333
#endif
@@ -56,8 +56,8 @@ typedef enum {
5656
} I2CName;
5757

5858
typedef enum {
59-
PWM_0 = (int)PWMREG_BASE,
60-
}PWMName;
59+
PWM_0 = (int)PWMREG_BASE,
60+
} PWMName;
6161

6262
#ifdef __cplusplus
6363
}

‎hal/targets/hal/TARGET_ONSEMI/TARGET_NCS36510/PeripheralPins.c

Lines changed: 31 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -14,8 +14,8 @@
1414
* limitations under the License.
1515
*/
1616

17-
/*todo: determine how function argument is used */
18-
17+
/*todo: determine how function argument is used */
18+
1919
#include "PeripheralPins.h"
2020

2121
/************ADC***************/
@@ -32,20 +32,20 @@ const PinMap PinMap_I2C_SDA[] = {
3232
{GPIO3, I2C_0, 5},
3333
{GPIO4, I2C_0, 5},
3434
{GPIO10, I2C_0, 5},
35-
{GPIO12, I2C_0, 5},
35+
{GPIO12, I2C_0, 5},
3636
{GPIO15, I2C_1, 5},
3737
{GPIO16, I2C_1, 5},
3838
{NC , NC , 0}
3939
};
4040

4141
const PinMap PinMap_I2C_SCL[] = {
42-
{GPIO2, I2C_0, 5},
43-
{GPIO5, I2C_0, 5},
44-
{GPIO11, I2C_0, 5},
45-
{GPIO13, I2C_0, 5},
46-
{GPIO14, I2C_1, 5},
47-
{GPIO17, I2C_1, 5},
48-
{NC , NC , 0}
42+
{GPIO2, I2C_0, 5},
43+
{GPIO5, I2C_0, 5},
44+
{GPIO11, I2C_0, 5},
45+
{GPIO13, I2C_0, 5},
46+
{GPIO14, I2C_1, 5},
47+
{GPIO17, I2C_1, 5},
48+
{NC , NC , 0}
4949
};
5050

5151
/************UART***************/
@@ -63,40 +63,44 @@ const PinMap PinMap_UART_RX[] = {
6363

6464
/************SPI***************/
6565
const PinMap PinMap_SPI_SCLK[] = {
66-
/*todo: other pins are possible, need to add */
66+
/*todo: other pins are possible, need to add */
6767
{SPI1_SCLK_2, SPI_0, 6},
6868
{SPI1_SCLK_3, SPI_0, 6},
69-
{SPI2_SCLK, SPI_1, 6},
70-
{NC, NC, 0}};
69+
{SPI2_SCLK, SPI_1, 6},
70+
{NC, NC, 0}
71+
};
7172

7273
const PinMap PinMap_SPI_MOSI[] = {
73-
/*todo: other pins are possible, need to add */
74+
/*todo: other pins are possible, need to add */
7475
{SPI1_SDATAO_2, SPI_0, 6},
75-
{SPI1_SDATAO_3, SPI_0, 6},
76+
{SPI1_SDATAO_3, SPI_0, 6},
7677
{SPI2_SDATAO, SPI_1, 6},
77-
{NC, NC, 0}};
78+
{NC, NC, 0}
79+
};
7880

7981
const PinMap PinMap_SPI_MISO[] = {
80-
/*todo: other pins are possible, need to add */
81-
{SPI1_SDATAI_2, SPI_0, 6},
82+
/*todo: other pins are possible, need to add */
83+
{SPI1_SDATAI_2, SPI_0, 6},
8284
{SPI1_SDATAI_3, SPI_0, 6},
8385
{SPI2_SDATAI, SPI_1, 6},
84-
{NC, NC, 0}};
86+
{NC, NC, 0}
87+
};
8588

8689
const PinMap PinMap_SPI_SSEL[] = {
87-
/*todo: other pins are possible, need to add */
88-
/* TODO what about SSNO */
90+
/*todo: other pins are possible, need to add */
91+
/* TODO what about SSNO */
8992
{SPI1_SSNI_2, SPI_0, 6},
90-
{SPI2_SSNI, SPI_1, 6},
91-
{NC, NC, 0}};
93+
{SPI2_SSNI, SPI_1, 6},
94+
{NC, NC, 0}
95+
};
9296

9397

9498
const PinMap PinMap_PWM[] = {
9599

96100
{GPIO6 , PWM_0 , 4},
97-
{GPIO7 , PWM_0 , 4},
98-
{GPIO9 , PWM_0 , 4},
99-
{GPIO12 , PWM_0 , 4},
100-
{GPIO13 , PWM_0 , 4},
101+
{GPIO7 , PWM_0 , 4},
102+
{GPIO9 , PWM_0 , 4},
103+
{GPIO12 , PWM_0 , 4},
104+
{GPIO13 , PWM_0 , 4},
101105
{NC , NC , 0}
102106
};

‎hal/targets/hal/TARGET_ONSEMI/TARGET_NCS36510/PeripheralPins.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@
1313
* See the License for the specific language governing permissions and
1414
* limitations under the License.
1515
*/
16-
16+
1717
#ifndef MBED_PERIPHERALPINS_H
1818
#define MBED_PERIPHERALPINS_H
1919

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