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Merge pull request #2747 from toyowata/master
[LPC11U68] Fix pin interrupt select offset
2 parents 363c041 + 1553c45 commit 2eb0b2c

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+29
-10
lines changed

1 file changed

+29
-10
lines changed

hal/targets/hal/TARGET_NXP/TARGET_LPC11U6X/gpio_irq_api.c

Lines changed: 29 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -59,7 +59,7 @@ void gpio_irq6(void) {handle_interrupt_in(6);}
5959
void gpio_irq7(void) {handle_interrupt_in(7);}
6060

6161
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
62-
// PINT only supprt PIO0_*, PIO1_* and from PIO2_0 to PIO0_7 interrupt
62+
// PINT only supprt PIO0_*, PIO1_* and from PIO2_0 to PIO2_7 interrupt
6363
if (pin >= P2_8) return -1;
6464

6565
irq_handler = handler;
@@ -79,7 +79,18 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
7979
/* Enable AHB clock to the PIN, GPIO and IOCON domain. */
8080
LPC_SYSCON->SYSAHBCLKCTRL |= ((1 << 19) | (1 << 16) | (1 << 7));
8181

82-
LPC_SYSCON->PINTSEL[obj->ch] = ((((pin >> PORT_SHIFT) & 0x3) * 24) + ((pin >> PIN_SHIFT) & 0x1F));
82+
/* Gets offset value for each port */
83+
uint32_t offset;
84+
switch ((pin >> PORT_SHIFT) & 0x3) {
85+
case 0: offset = 0; // PIO0[23:0]
86+
break;
87+
case 1: offset = 24; // PIO1[31:0]
88+
break;
89+
case 2: offset = 56; // PIO2[7:0]
90+
break;
91+
}
92+
/* Set the INTPIN number : offset + pin_number */
93+
LPC_SYSCON->PINTSEL[obj->ch] = (offset + ((pin >> PIN_SHIFT) & 0x1F));
8394

8495
// Interrupt Wake-Up Enable
8596
LPC_SYSCON->STARTERP0 |= (1 << obj->ch);
@@ -88,14 +99,22 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
8899

89100
void (*channels_irq)(void) = NULL;
90101
switch (obj->ch) {
91-
case 0: channels_irq = &gpio_irq0; break;
92-
case 1: channels_irq = &gpio_irq1; break;
93-
case 2: channels_irq = &gpio_irq2; break;
94-
case 3: channels_irq = &gpio_irq3; break;
95-
case 4: channels_irq = &gpio_irq4; break;
96-
case 5: channels_irq = &gpio_irq5; break;
97-
case 6: channels_irq = &gpio_irq6; break;
98-
case 7: channels_irq = &gpio_irq7; break;
102+
case 0: channels_irq = &gpio_irq0;
103+
break;
104+
case 1: channels_irq = &gpio_irq1;
105+
break;
106+
case 2: channels_irq = &gpio_irq2;
107+
break;
108+
case 3: channels_irq = &gpio_irq3;
109+
break;
110+
case 4: channels_irq = &gpio_irq4;
111+
break;
112+
case 5: channels_irq = &gpio_irq5;
113+
break;
114+
case 6: channels_irq = &gpio_irq6;
115+
break;
116+
case 7: channels_irq = &gpio_irq7;
117+
break;
99118
}
100119
NVIC_SetVector((IRQn_Type)(PININT_IRQ + obj->ch), (uint32_t)channels_irq);
101120
NVIC_EnableIRQ((IRQn_Type)(PININT_IRQ + obj->ch));

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