Skip to content

Commit 2fb9de9

Browse files
bogdanmbogdanm
committed
Merge pull request #127 from 0xc0170/dev_KL05Z_exporters
Dev kl05 z exporters
2 parents 5dea203 + 5747a45 commit 2fb9de9

File tree

10 files changed

+1058
-5
lines changed

10 files changed

+1058
-5
lines changed

‎README.md

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -35,8 +35,9 @@ NXP:
3535
* LPC11C24 (Cortex-M0)
3636

3737
Freescale:
38-
* [KL25Z](http://mbed.org/platforms/KL25Z/) (Cortex-M0+)
3938
* KL05Z (Cortex-M0+)
39+
* [KL25Z](http://mbed.org/platforms/KL25Z/) (Cortex-M0+)
40+
* KL46Z (Cortex-M0+)
4041

4142
STMicroelectronics:
4243
* STM32F407 (Cortex-M4)

‎libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL05Z/TOOLCHAIN_GCC_ARM/MKL05Z4.ld

Lines changed: 154 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,154 @@
1+
/*
2+
* KL05Z ARM GCC linker script file, Martin Kojtal (0xc0170)
3+
*/
4+
5+
MEMORY
6+
{
7+
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000410
8+
FLASH (rx) : ORIGIN = 0x00000410, LENGTH = 32K - 0x00000410
9+
RAM (rwx) : ORIGIN = 0x1FFFFC00, LENGTH = 4K - 0xC0
10+
}
11+
12+
/* Linker script to place sections and symbol values. Should be used together
13+
* with other linker script that defines memory regions FLASH and RAM.
14+
* It references following symbols, which must be defined in code:
15+
* _reset_init : Entry of reset handler
16+
*
17+
* It defines following symbols, which code can use without definition:
18+
* __exidx_start
19+
* __exidx_end
20+
* __etext
21+
* __data_start__
22+
* __preinit_array_start
23+
* __preinit_array_end
24+
* __init_array_start
25+
* __init_array_end
26+
* __fini_array_start
27+
* __fini_array_end
28+
* __data_end__
29+
* __bss_start__
30+
* __bss_end__
31+
* __end__
32+
* end
33+
* __HeapLimit
34+
* __StackLimit
35+
* __StackTop
36+
* __stack
37+
*/
38+
ENTRY(Reset_Handler)
39+
40+
SECTIONS
41+
{
42+
.isr_vector :
43+
{
44+
__vector_table = .;
45+
KEEP(*(.vector_table))
46+
. = ALIGN(4);
47+
} > VECTORS
48+
49+
.text :
50+
{
51+
*(.text*)
52+
53+
KEEP(*(.init))
54+
KEEP(*(.fini))
55+
56+
/* .ctors */
57+
*crtbegin.o(.ctors)
58+
*crtbegin?.o(.ctors)
59+
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
60+
*(SORT(.ctors.*))
61+
*(.ctors)
62+
63+
/* .dtors */
64+
*crtbegin.o(.dtors)
65+
*crtbegin?.o(.dtors)
66+
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
67+
*(SORT(.dtors.*))
68+
*(.dtors)
69+
70+
*(.rodata*)
71+
72+
KEEP(*(.eh_frame*))
73+
} > FLASH
74+
75+
.ARM.extab :
76+
{
77+
*(.ARM.extab* .gnu.linkonce.armextab.*)
78+
} > FLASH
79+
80+
__exidx_start = .;
81+
.ARM.exidx :
82+
{
83+
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
84+
} > FLASH
85+
__exidx_end = .;
86+
87+
__etext = .;
88+
89+
.data : AT (__etext)
90+
{
91+
__data_start__ = .;
92+
*(vtable)
93+
*(.data*)
94+
95+
. = ALIGN(4);
96+
/* preinit data */
97+
PROVIDE_HIDDEN (__preinit_array_start = .);
98+
KEEP(*(.preinit_array))
99+
PROVIDE_HIDDEN (__preinit_array_end = .);
100+
101+
. = ALIGN(4);
102+
/* init data */
103+
PROVIDE_HIDDEN (__init_array_start = .);
104+
KEEP(*(SORT(.init_array.*)))
105+
KEEP(*(.init_array))
106+
PROVIDE_HIDDEN (__init_array_end = .);
107+
108+
109+
. = ALIGN(4);
110+
/* finit data */
111+
PROVIDE_HIDDEN (__fini_array_start = .);
112+
KEEP(*(SORT(.fini_array.*)))
113+
KEEP(*(.fini_array))
114+
PROVIDE_HIDDEN (__fini_array_end = .);
115+
116+
. = ALIGN(4);
117+
/* All data end */
118+
__data_end__ = .;
119+
120+
} > RAM
121+
122+
.bss :
123+
{
124+
__bss_start__ = .;
125+
*(.bss*)
126+
*(COMMON)
127+
__bss_end__ = .;
128+
} > RAM
129+
130+
.heap :
131+
{
132+
__end__ = .;
133+
end = __end__;
134+
*(.heap*)
135+
__HeapLimit = .;
136+
} > RAM
137+
138+
/* .stack_dummy section doesn't contains any symbols. It is only
139+
* used for linker to calculate size of stack sections, and assign
140+
* values to stack symbols later */
141+
.stack_dummy :
142+
{
143+
*(.stack)
144+
} > RAM
145+
146+
/* Set stack top to end of RAM, and stack limit move down by
147+
* size of stack_dummy section */
148+
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
149+
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
150+
PROVIDE(__stack = __StackTop);
151+
152+
/* Check if data + heap + stack exceeds RAM limit */
153+
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
154+
}

‎libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL05Z/TOOLCHAIN_GCC_ARM/startup_MKL05Z4.s

Lines changed: 225 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,225 @@
1+
/* KL05Z startup ARM GCC, Martin Kojtal (0xc0170)
2+
* Purpose: startup file for Cortex-M0 devices. Should use with
3+
* GCC for ARM Embedded Processors
4+
* Version: V1.2
5+
* Date: 15 Nov 2011
6+
*
7+
* Copyright (c) 2011, ARM Limited
8+
* All rights reserved.
9+
*
10+
* Redistribution and use in source and binary forms, with or without
11+
* modification, are permitted provided that the following conditions are met:
12+
* Redistributions of source code must retain the above copyright
13+
notice, this list of conditions and the following disclaimer.
14+
* Redistributions in binary form must reproduce the above copyright
15+
notice, this list of conditions and the following disclaimer in the
16+
documentation and/or other materials provided with the distribution.
17+
* Neither the name of the ARM Limited nor the
18+
names of its contributors may be used to endorse or promote products
19+
derived from this software without specific prior written permission.
20+
*
21+
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
22+
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23+
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24+
* DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
25+
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26+
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27+
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28+
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29+
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
30+
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31+
*/
32+
.syntax unified
33+
.arch armv6-m
34+
35+
/* Memory Model
36+
The HEAP starts at the end of the DATA section and grows upward.
37+
38+
The STACK starts at the end of the RAM and grows downward.
39+
40+
The HEAP and stack STACK are only checked at compile time:
41+
(DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
42+
43+
This is just a check for the bare minimum for the Heap+Stack area before
44+
aborting compilation, it is not the run time limit:
45+
Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
46+
*/
47+
.section .stack
48+
.align 3
49+
#ifdef __STACK_SIZE
50+
.equ Stack_Size, __STACK_SIZE
51+
#else
52+
.equ Stack_Size, 0x80
53+
#endif
54+
.globl __StackTop
55+
.globl __StackLimit
56+
__StackLimit:
57+
.space Stack_Size
58+
.size __StackLimit, . - __StackLimit
59+
__StackTop:
60+
.size __StackTop, . - __StackTop
61+
62+
.section .heap
63+
.align 3
64+
#ifdef __HEAP_SIZE
65+
.equ Heap_Size, __HEAP_SIZE
66+
#else
67+
.equ Heap_Size, 0x80
68+
#endif
69+
.globl __HeapBase
70+
.globl __HeapLimit
71+
__HeapBase:
72+
.space Heap_Size
73+
.size __HeapBase, . - __HeapBase
74+
__HeapLimit:
75+
.size __HeapLimit, . - __HeapLimit
76+
77+
.section .vector_table,"a",%progbits
78+
.align 2
79+
.globl __isr_vector
80+
__isr_vector:
81+
.long __StackTop /* Top of Stack */
82+
.long Reset_Handler /* Reset Handler */
83+
.long NMI_Handler /* NMI Handler */
84+
.long HardFault_Handler /* Hard Fault Handler */
85+
.long 0 /* Reserved */
86+
.long 0 /* Reserved */
87+
.long 0 /* Reserved */
88+
.long 0 /* Reserved */
89+
.long 0 /* Reserved */
90+
.long 0 /* Reserved */
91+
.long 0 /* Reserved */
92+
.long SVC_Handler /* SVCall Handler */
93+
.long 0 /* Reserved */
94+
.long 0 /* Reserved */
95+
.long PendSV_Handler /* PendSV Handler */
96+
.long SysTick_Handler /* SysTick Handler */
97+
98+
/* External interrupts */
99+
.long DMA0_IRQHandler /* DMA channel 0 transfer complete interrupt */
100+
.long DMA1_IRQHandler /* DMA channel 1 transfer complete interrupt */
101+
.long DMA2_IRQHandler /* DMA channel 2 transfer complete interrupt */
102+
.long DMA3_IRQHandler /* DMA channel 3 transfer complete interrupt */
103+
.long Default_Handler /* Reserved interrupt 20 */
104+
.long FTFA_IRQHandler /* FTFA interrupt */
105+
.long LVD_LVW_IRQHandler /* Low Voltage Detect, Low Voltage Warning */
106+
.long LLW_IRQHandler /* Low Leakage Wakeup */
107+
.long I2C0_IRQHandler /* I2C0 interrupt */
108+
.long Default_Handler /* Reserved interrupt 25 */
109+
.long SPI0_IRQHandler /* SPI0 interrupt */
110+
.long Default_Handler /* Reserved interrupt 27 */
111+
.long UART0_IRQHandler /* UART0 status/error interrupt */
112+
.long Default_Handler /* Reserved interrupt 29 */
113+
.long Default_Handler /* Reserved interrupt 30 */
114+
.long ADC0_IRQHandler /* ADC0 interrupt */
115+
.long CMP0_IRQHandler /* CMP0 interrupt */
116+
.long TPM0_IRQHandler /* TPM0 fault, overflow and channels interrupt */
117+
.long TPM1_IRQHandler /* TPM1 fault, overflow and channels interrupt */
118+
.long Default_Handler /* Reserved interrupt 35 */
119+
.long RTC_IRQHandler /* RTC interrupt */
120+
.long RTC_Seconds_IRQHandler /* RTC seconds interrupt */
121+
.long PIT_IRQHandler /* PIT timer interrupt */
122+
.long Default_Handler /* Reserved interrupt 39 */
123+
.long Default_Handler /* Reserved interrupt 40 */
124+
.long DAC0_IRQHandler /* DAC interrupt */
125+
.long TSI0_IRQHandler /* TSI0 interrupt */
126+
.long MCG_IRQHandler /* MCG interrupt */
127+
.long LPTimer_IRQHandler /* LPTimer interrupt */
128+
.long Default_Handler /* Reserved interrupt 45 */
129+
.long PORTA_IRQHandler /* Port A interrupt */
130+
.long PORTB_IRQHandler /* Port B interrupt */
131+
132+
.size __isr_vector, . - __isr_vector
133+
.org 0x400, 0xff
134+
135+
.long 0xffffffff
136+
.long 0xffffffff
137+
.long 0xffffffff
138+
.long 0xfffffffe
139+
140+
.section .text.Reset_Handler
141+
.thumb
142+
.thumb_func
143+
.align 2
144+
.globl Reset_Handler
145+
.type Reset_Handler, %function
146+
Reset_Handler:
147+
/* Loop to copy data from read only memory to RAM. The ranges
148+
* of copy from/to are specified by following symbols evaluated in
149+
* linker script.
150+
* __etext: End of code section, i.e., begin of data sections to copy from.
151+
* __data_start__/__data_end__: RAM address range that data should be
152+
* copied to. Both must be aligned to 4 bytes boundary. */
153+
154+
ldr r1, =__etext
155+
ldr r2, =__data_start__
156+
ldr r3, =__data_end__
157+
158+
subs r3, r2
159+
ble .flash_to_ram_loop_end
160+
161+
movs r4, 0
162+
.flash_to_ram_loop:
163+
ldr r0, [r1,r4]
164+
str r0, [r2,r4]
165+
adds r4, 4
166+
cmp r4, r3
167+
blt .flash_to_ram_loop
168+
.flash_to_ram_loop_end:
169+
170+
ldr r0, =SystemInit
171+
blx r0
172+
ldr r0, =_start
173+
bx r0
174+
.pool
175+
.size Reset_Handler, . - Reset_Handler
176+
177+
.text
178+
/* Macro to define default handlers. Default handler
179+
* will be weak symbol and just dead loops. They can be
180+
* overwritten by other handlers */
181+
.macro def_default_handler handler_name
182+
.align 1
183+
.thumb_func
184+
.weak \handler_name
185+
.type \handler_name, %function
186+
\handler_name :
187+
b .
188+
.size \handler_name, . - \handler_name
189+
.endm
190+
191+
def_default_handler NMI_Handler
192+
def_default_handler HardFault_Handler
193+
def_default_handler SVC_Handler
194+
def_default_handler PendSV_Handler
195+
def_default_handler SysTick_Handler
196+
def_default_handler Default_Handler
197+
198+
def_default_handler DMA0_IRQHandler
199+
def_default_handler DMA1_IRQHandler
200+
def_default_handler DMA2_IRQHandler
201+
def_default_handler DMA3_IRQHandler
202+
def_default_handler FTFA_IRQHandler
203+
def_default_handler LVD_LVW_IRQHandler
204+
def_default_handler LLW_IRQHandler
205+
def_default_handler I2C0_IRQHandler
206+
def_default_handler SPI0_IRQHandler
207+
def_default_handler UART0_IRQHandler
208+
def_default_handler ADC0_IRQHandler
209+
def_default_handler CMP0_IRQHandler
210+
def_default_handler TPM0_IRQHandler
211+
def_default_handler TPM1_IRQHandler
212+
def_default_handler RTC_IRQHandler
213+
def_default_handler RTC_Seconds_IRQHandler
214+
def_default_handler PIT_IRQHandler
215+
def_default_handler DAC0_IRQHandler
216+
def_default_handler TSI0_IRQHandler
217+
def_default_handler MCG_IRQHandler
218+
def_default_handler LPTimer_IRQHandler
219+
def_default_handler PORTA_IRQHandler
220+
def_default_handler PORTB_IRQHandler
221+
222+
.weak DEF_IRQHandler
223+
.set DEF_IRQHandler, Default_Handler
224+
225+
.end

0 commit comments

Comments
 (0)