Removing redundant code.

Ashok Rao · Ashok Rao · commit 339f806c71a5 · 2019-03-18T12:37:27.000Z
MCO pins are not brought out on MTB / MCB design.
diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_MTB_STM32_F439/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_MTB_STM32_F439/system_clock.c
@@ -178,8 +178,6 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
         return 0; // FAIL
     }
 
-    // HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_3);
-
     return 1;
 }
 #endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
@@ -233,8 +231,6 @@ uint8_t SetSysClock_PLL_HSI(void)
         return 0; // FAIL
     }
 
-    // HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_3);
-
     return 1;
 }
 #endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */

Original file line number	Diff line number	Diff line change
`@@ -178,8 +178,6 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)`
`178`	`178`	`return 0; // FAIL`
`179`	`179`	`}`
`180`	`180`
`181`		`- // HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_3);`
`182`		`-`
`183`	`181`	`return 1;`
`184`	`182`	`}`
`185`	`183`	`#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) \|\| ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */`
`@@ -233,8 +231,6 @@ uint8_t SetSysClock_PLL_HSI(void)`
`233`	`231`	`return 0; // FAIL`
`234`	`232`	`}`
`235`	`233`
`236`		`- // HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_3);`
`237`		`-`
`238`	`234`	`return 1;`
`239`	`235`	`}`
`240`	`236`	`#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */`