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Initial version of a ld and a startup for KL25Z ARM GCC
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‎libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld

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MEMORY
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{
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VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x000003FE
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FLASHCFG (rx) : ORIGIN = 0x00000400, LENGTH = 0x00000010
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FLASH (rx) : ORIGIN = 0x00000410, LENGTH = 128K - 0x410
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RAM (rwx) : ORIGIN = 0x1FFFF000, LENGTH = 16K
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}
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/* Linker script to place sections and symbol values. Should be used together
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* with other linker script that defines memory regions FLASH and RAM.
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* It references following symbols, which must be defined in code:
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* _reset_init : Entry of reset handler
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*
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* It defines following symbols, which code can use without definition:
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* __exidx_start
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* __exidx_end
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* __etext
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* __data_start__
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* __preinit_array_start
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* __preinit_array_end
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* __init_array_start
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* __init_array_end
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* __fini_array_start
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* __fini_array_end
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* __data_end__
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* __bss_start__
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* __bss_end__
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* __end__
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* end
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* __HeapLimit
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* __StackLimit
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* __StackTop
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* __stack
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*/
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ENTRY(Reset_Handler)
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SECTIONS
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{
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.isr_vector :
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{
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__vector_table = .;
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. = ALIGN(4);
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KEEP(*(.isr_vector))
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*(.text.SystemInit)
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. = ALIGN(4);
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} > VECTORS
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.cfmprotect :
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{
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. = ALIGN(4);
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KEEP(*(.cfmprotect))
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} > FLASHCFG
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.text :
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{
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*(.text*)
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KEEP(*(.init))
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KEEP(*(.fini))
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/* .ctors */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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/* .dtors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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*(.rodata*)
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KEEP(*(.eh_frame*))
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} > FLASH
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > FLASH
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__exidx_end = .;
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__etext = .;
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.data : AT (__etext)
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{
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__data_start__ = .;
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*(vtable)
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*(.data*)
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. = ALIGN(4);
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/* preinit data */
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE_HIDDEN (__fini_array_end = .);
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. = ALIGN(4);
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/* All data end */
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__data_end__ = .;
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} > RAM
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.bss :
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{
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__bss_start__ = .;
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*(.bss*)
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*(COMMON)
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__bss_end__ = .;
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} > RAM
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.heap :
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{
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__end__ = .;
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end = __end__;
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*(.heap*)
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__HeapLimit = .;
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} > RAM
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/* .stack_dummy section doesn't contains any symbols. It is only
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* used for linker to calculate size of stack sections, and assign
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* values to stack symbols later */
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.stack_dummy :
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{
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*(.stack)
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} > RAM
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/* Set stack top to end of RAM, and stack limit move down by
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* size of stack_dummy section */
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__StackTop = ORIGIN(RAM) + LENGTH(RAM);
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__StackLimit = __StackTop - SIZEOF(.stack_dummy);
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
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}

‎libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s

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/* File: startup_ARMCM0.S
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* Purpose: startup file for Cortex-M0 devices. Should use with
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* GCC for ARM Embedded Processors
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* Version: V1.2
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* Date: 15 Nov 2011
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*
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* Copyright (c) 2011, ARM Limited
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of the ARM Limited nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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.syntax unified
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.arch armv6-m
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/* Memory Model
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The HEAP starts at the end of the DATA section and grows upward.
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The STACK starts at the end of the RAM and grows downward.
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The HEAP and stack STACK are only checked at compile time:
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(DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
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This is just a check for the bare minimum for the Heap+Stack area before
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aborting compilation, it is not the run time limit:
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Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
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*/
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.section .stack
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.align 3
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#ifdef __STACK_SIZE
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.equ Stack_Size, __STACK_SIZE
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#else
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.equ Stack_Size, 0x80
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#endif
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.globl __StackTop
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.globl __StackLimit
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__StackLimit:
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.space Stack_Size
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.size __StackLimit, . - __StackLimit
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__StackTop:
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.size __StackTop, . - __StackTop
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.section .heap
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.align 3
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#ifdef __HEAP_SIZE
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.equ Heap_Size, __HEAP_SIZE
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#else
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.equ Heap_Size, 0x80
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#endif
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.globl __HeapBase
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.globl __HeapLimit
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__HeapBase:
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.space Heap_Size
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.size __HeapBase, . - __HeapBase
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__HeapLimit:
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.size __HeapLimit, . - __HeapLimit
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.section .isr_vector
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.align 2
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.globl __isr_vector
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__isr_vector:
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.long __StackTop /* Top of Stack */
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.long Reset_Handler /* Reset Handler */
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.long NMI_Handler /* NMI Handler */
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.long HardFault_Handler /* Hard Fault Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long SVC_Handler /* SVCall Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long PendSV_Handler /* PendSV Handler */
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.long SysTick_Handler /* SysTick Handler */
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/* External interrupts */
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.long DMA0_IRQHandler /* DMA channel 0 transfer complete interrupt */
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.long DMA1_IRQHandler /* DMA channel 1 transfer complete interrupt */
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.long DMA2_IRQHandler /* DMA channel 2 transfer complete interrupt */
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.long DMA3_IRQHandler /* DMA channel 3 transfer complete interrupt */
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.long Reserved20_IRQHandler /* Reserved interrupt 20 */
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.long FTFA_IRQHandler /* FTFA interrupt */
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.long LVD_LVW_IRQHandler /* Low Voltage Detect, Low Voltage Warning */
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.long LLW_IRQHandler /* Low Leakage Wakeup */
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.long I2C0_IRQHandler /* I2C0 interrupt */
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.long I2C1_IRQHandler /* I2C0 interrupt 25 */
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.long SPI0_IRQHandler /* SPI0 interrupt */
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.long SPI1_IRQHandler /* SPI1 interrupt */
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.long UART0_IRQHandler /* UART0 status/error interrupt */
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.long UART1_IRQHandler /* UART1 status/error interrupt */
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.long UART2_IRQHandler /* UART2 status/error interrupt */
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.long ADC0_IRQHandler /* ADC0 interrupt */
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.long CMP0_IRQHandler /* CMP0 interrupt */
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.long TPM0_IRQHandler /* TPM0 fault, overflow and channels interrupt */
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.long TPM1_IRQHandler /* TPM1 fault, overflow and channels interrupt */
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.long TPM2_IRQHandler /* TPM2 fault, overflow and channels interrupt */
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.long RTC_IRQHandler /* RTC interrupt */
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.long RTC_Seconds_IRQHandler /* RTC seconds interrupt */
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.long PIT_IRQHandler /* PIT timer interrupt */
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.long Reserved39_IRQHandler /* Reserved interrupt 39 */
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.long USB0_IRQHandler /* USB0 interrupt */
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.long DAC0_IRQHandler /* DAC interrupt */
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.long TSI0_IRQHandler /* TSI0 interrupt */
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.long MCG_IRQHandler /* MCG interrupt */
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.long LPTimer_IRQHandler /* LPTimer interrupt */
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.long Reserved45_IRQHandler /* Reserved interrupt 45 */
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.long PORTA_IRQHandler /* Port A interrupt */
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.long PORTD_IRQHandler /* Port D interrupt */
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.size __isr_vector, . - __isr_vector
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.section .cfmprotect
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.align 2
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.globl kinetis_flash_config
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kinetis_flash_config:
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.long 0xffffffff
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.long 0xffffffff
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.long 0xffffffff
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.long 0xffffffff
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.section .text
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.thumb
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.thumb_func
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.align 2
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.globl Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* Loop to copy data from read only memory to RAM. The ranges
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* of copy from/to are specified by following symbols evaluated in
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* linker script.
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* __etext: End of code section, i.e., begin of data sections to copy from.
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* __data_start__/__data_end__: RAM address range that data should be
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* copied to. Both must be aligned to 4 bytes boundary. */
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ldr r1, =__etext
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ldr r2, =__data_start__
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ldr r3, =__data_end__
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subs r3, r2
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ble .flash_to_ram_loop_end
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movs r4, 0
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.flash_to_ram_loop:
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ldr r0, [r1,r4]
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str r0, [r2,r4]
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adds r4, 4
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cmp r4, r3
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blt .flash_to_ram_loop
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.flash_to_ram_loop_end:
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ldr r0, =SystemInit
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blx r0
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ldr r0, =_start
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bx r0
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.pool
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.size Reset_Handler, . - Reset_Handler
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.text
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/* Macro to define default handlers. Default handler
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* will be weak symbol and just dead loops. They can be
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* overwritten by other handlers */
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.macro def_default_handler handler_name
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.align 1
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.thumb_func
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.weak \handler_name
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.type \handler_name, %function
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\handler_name :
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b .
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.size \handler_name, . - \handler_name
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.endm
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def_default_handler NMI_Handler
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def_default_handler HardFault_Handler
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def_default_handler SVC_Handler
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def_default_handler PendSV_Handler
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def_default_handler SysTick_Handler
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def_default_handler DMA0_IRQHandler
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def_default_handler DMA1_IRQHandler
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def_default_handler DMA2_IRQHandler
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def_default_handler DMA3_IRQHandler
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def_default_handler Reserved20_IRQHandler
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def_default_handler FTFA_IRQHandler
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def_default_handler LVD_LVW_IRQHandler
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def_default_handler LLW_IRQHandler
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def_default_handler I2C0_IRQHandler
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def_default_handler I2C1_IRQHandler
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def_default_handler SPI0_IRQHandler
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def_default_handler SPI1_IRQHandler
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def_default_handler UART0_IRQHandler
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def_default_handler UART1_IRQHandler
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def_default_handler UART2_IRQHandler
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def_default_handler ADC0_IRQHandler
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def_default_handler CMP0_IRQHandler
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def_default_handler TPM0_IRQHandler
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def_default_handler TPM1_IRQHandler
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def_default_handler TPM2_IRQHandler
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def_default_handler RTC_IRQHandler
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def_default_handler RTC_Seconds_IRQHandler
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def_default_handler PIT_IRQHandler
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def_default_handler Reserved39_IRQHandler
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def_default_handler USB0_IRQHandler
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def_default_handler DAC0_IRQHandler
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def_default_handler TSI0_IRQHandler
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def_default_handler MCG_IRQHandler
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def_default_handler LPTimer_IRQHandler
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def_default_handler Reserved45_IRQHandler
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def_default_handler PORTA_IRQHandler
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def_default_handler PORTD_IRQHandler
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.weak DEF_IRQHandler
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.set DEF_IRQHandler, Default_Handler
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.end

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