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Merge pull request #10753 from desmond-blue/feature-fix-nrf52-uart-count
Fix nrf52 enabled uart count and enable uart0/1
2 parents cda2031 + d5624b6 commit 378e997

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3 files changed

+16
-11
lines changed

3 files changed

+16
-11
lines changed

targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4152,11 +4152,11 @@
41524152
// <e> NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver
41534153
//==========================================================
41544154
#ifndef NRFX_UARTE_ENABLED
4155-
#define NRFX_UARTE_ENABLED 0
4155+
#define NRFX_UARTE_ENABLED 1
41564156
#endif
41574157
// <o> NRFX_UARTE0_ENABLED - Enable UARTE0 instance
41584158
#ifndef NRFX_UARTE0_ENABLED
4159-
#define NRFX_UARTE0_ENABLED 0
4159+
#define NRFX_UARTE0_ENABLED 1
41604160
#endif
41614161

41624162
// <o> NRFX_UARTE1_ENABLED - Enable UARTE1 instance

targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4152,16 +4152,16 @@
41524152
// <e> NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver
41534153
//==========================================================
41544154
#ifndef NRFX_UARTE_ENABLED
4155-
#define NRFX_UARTE_ENABLED 0
4155+
#define NRFX_UARTE_ENABLED 1
41564156
#endif
41574157
// <o> NRFX_UARTE0_ENABLED - Enable UARTE0 instance
41584158
#ifndef NRFX_UARTE0_ENABLED
4159-
#define NRFX_UARTE0_ENABLED 0
4159+
#define NRFX_UARTE0_ENABLED 1
41604160
#endif
41614161

41624162
// <o> NRFX_UARTE1_ENABLED - Enable UARTE1 instance
41634163
#ifndef NRFX_UARTE1_ENABLED
4164-
#define NRFX_UARTE1_ENABLED 0
4164+
#define NRFX_UARTE1_ENABLED 1
41654165
#endif
41664166

41674167
// <o> NRFX_UARTE_DEFAULT_CONFIG_HWFC - Hardware Flow Control
@@ -5615,7 +5615,7 @@
56155615
// <e> UART1_ENABLED - Enable UART1 instance
56165616
//==========================================================
56175617
#ifndef UART1_ENABLED
5618-
#define UART1_ENABLED 0
5618+
#define UART1_ENABLED 1
56195619
#endif
56205620
// </e>
56215621

targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c

Lines changed: 10 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,7 @@
4141
#include "hal/serial_api.h"
4242

4343
#include "nrf_uarte.h"
44+
#include "nrfx_uarte.h"
4445
#include "nrfx_uart.h"
4546
#include "nrf_atfifo.h"
4647
#include "app_util_platform.h"
@@ -166,12 +167,12 @@ typedef enum {
166167
/**
167168
* UARTE state. One for each instance.
168169
*/
169-
static nordic_uart_state_t nordic_nrf5_uart_state[NRFX_UART_ENABLED_COUNT] = { 0 };
170+
static nordic_uart_state_t nordic_nrf5_uart_state[NRFX_UARTE_ENABLED_COUNT] = { 0 };
170171

171172
/**
172173
* Array with UARTE register pointers for easy access.
173174
*/
174-
static NRF_UARTE_Type *nordic_nrf5_uart_register[NRFX_UART_ENABLED_COUNT] = {
175+
static NRF_UARTE_Type *nordic_nrf5_uart_register[NRFX_UARTE_ENABLED_COUNT] = {
175176
NRF_UARTE0,
176177
#if UART1_ENABLED
177178
NRF_UARTE1,
@@ -193,6 +194,10 @@ NRF_ATFIFO_DEF(nordic_nrf5_uart_fifo_1, uint8_t, UART1_FIFO_BUFFER_SIZE);
193194
*/
194195
static uint8_t nordic_nrf5_uart_swi_mask_tx_0 = 0;
195196
static uint8_t nordic_nrf5_uart_swi_mask_rx_0 = 0;
197+
#if UART1_ENABLED
198+
static uint8_t nordic_nrf5_uart_swi_mask_tx_1 = 0;
199+
static uint8_t nordic_nrf5_uart_swi_mask_rx_1 = 0;
200+
#endif
196201

197202
/**
198203
* Global variables expected by mbed_retarget.cpp for STDOUT.
@@ -881,7 +886,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
881886
nordic_nrf5_uart_state[1].owner = NULL;
882887

883888
/* Allocate a PPI channel for flow control */
884-
ret = nrf_drv_ppi_channel_alloc(&nordic_nrf5_uart_state[1].ppi_rts);
889+
ret = nrfx_ppi_channel_alloc(&nordic_nrf5_uart_state[1].ppi_rts);
885890
MBED_ASSERT(ret == NRF_SUCCESS);
886891

887892
/* Clear RTS */
@@ -891,8 +896,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
891896
nrf_uarte_int_disable(nordic_nrf5_uart_register[1], 0xFFFFFFFF);
892897

893898
NVIC_SetVector(UARTE1_IRQn, (uint32_t) nordic_nrf5_uart1_handler);
894-
NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(UARTE1_IRQn), APP_IRQ_PRIORITY_HIGHEST);
895-
NRFX_IRQ_ENABLE(nrfx_get_irq_number(UARTE1_IRQn));
899+
NRFX_IRQ_PRIORITY_SET(UARTE1_IRQn, APP_IRQ_PRIORITY_HIGHEST);
900+
NRFX_IRQ_ENABLE(UARTE1_IRQn);
896901
#endif
897902
}
898903

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