@@ -387,11 +387,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
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/* Check the parameters */
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assert_param (IS_TIM_DMA_INSTANCE (htim -> Instance ));
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- if (( htim -> State == HAL_TIM_STATE_BUSY ) )
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+ if (htim -> State == HAL_TIM_STATE_BUSY )
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{
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return HAL_BUSY ;
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}
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- else if (( htim -> State == HAL_TIM_STATE_READY ) )
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+ else if (htim -> State == HAL_TIM_STATE_READY )
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{
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if ((pData == 0 ) && (Length > 0 ))
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{
@@ -795,11 +795,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
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/* Check the parameters */
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assert_param (IS_TIM_CCX_INSTANCE (htim -> Instance , Channel ));
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- if (( htim -> State == HAL_TIM_STATE_BUSY ) )
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+ if (htim -> State == HAL_TIM_STATE_BUSY )
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{
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return HAL_BUSY ;
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}
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- else if (( htim -> State == HAL_TIM_STATE_READY ) )
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+ else if (htim -> State == HAL_TIM_STATE_READY )
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{
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if (((uint32_t )pData == 0 ) && (Length > 0 ))
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{
@@ -1315,11 +1315,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
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/* Check the parameters */
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assert_param (IS_TIM_CCX_INSTANCE (htim -> Instance , Channel ));
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- if (( htim -> State == HAL_TIM_STATE_BUSY ) )
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+ if (htim -> State == HAL_TIM_STATE_BUSY )
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{
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return HAL_BUSY ;
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}
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- else if (( htim -> State == HAL_TIM_STATE_READY ) )
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+ else if (htim -> State == HAL_TIM_STATE_READY )
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{
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if (((uint32_t )pData == 0 ) && (Length > 0 ))
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{
@@ -1802,11 +1802,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
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assert_param (IS_TIM_CCX_INSTANCE (htim -> Instance , Channel ));
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assert_param (IS_TIM_DMA_CC_INSTANCE (htim -> Instance ));
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- if (( htim -> State == HAL_TIM_STATE_BUSY ) )
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+ if (htim -> State == HAL_TIM_STATE_BUSY )
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{
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return HAL_BUSY ;
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}
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- else if (( htim -> State == HAL_TIM_STATE_READY ) )
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+ else if (htim -> State == HAL_TIM_STATE_READY )
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{
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if ((pData == 0 ) && (Length > 0 ))
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{
@@ -2643,11 +2643,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
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/* Check the parameters */
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assert_param (IS_TIM_DMA_CC_INSTANCE (htim -> Instance ));
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- if (( htim -> State == HAL_TIM_STATE_BUSY ) )
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+ if (htim -> State == HAL_TIM_STATE_BUSY )
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{
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return HAL_BUSY ;
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}
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- else if (( htim -> State == HAL_TIM_STATE_READY ) )
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+ else if (htim -> State == HAL_TIM_STATE_READY )
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{
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if ((((pData1 == 0 ) || (pData2 == 0 ) )) && (Length > 0 ))
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{
@@ -3473,11 +3473,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
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assert_param (IS_TIM_DMA_SOURCE (BurstRequestSrc ));
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assert_param (IS_TIM_DMA_LENGTH (BurstLength ));
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- if (( htim -> State == HAL_TIM_STATE_BUSY ) )
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+ if (htim -> State == HAL_TIM_STATE_BUSY )
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{
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return HAL_BUSY ;
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}
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- else if (( htim -> State == HAL_TIM_STATE_READY ) )
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+ else if (htim -> State == HAL_TIM_STATE_READY )
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{
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if ((BurstBuffer == 0 ) && (BurstLength > 0 ))
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{
@@ -3696,11 +3696,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
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assert_param (IS_TIM_DMA_SOURCE (BurstRequestSrc ));
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assert_param (IS_TIM_DMA_LENGTH (BurstLength ));
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- if (( htim -> State == HAL_TIM_STATE_BUSY ) )
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+ if (htim -> State == HAL_TIM_STATE_BUSY )
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{
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return HAL_BUSY ;
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}
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- else if (( htim -> State == HAL_TIM_STATE_READY ) )
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+ else if (htim -> State == HAL_TIM_STATE_READY )
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{
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if ((BurstBuffer == 0 ) && (BurstLength > 0 ))
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{
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