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adustm
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0xc0170
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[NUCLEO_F746ZG] fix pins and system files after manual and automatic test phase
1 parent 1ecd69b commit 3b3f892

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-252
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2 files changed

+11
-252
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‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F746ZG/system_stm32f7xx.c

Lines changed: 3 additions & 245 deletions
Original file line numberDiff line numberDiff line change
@@ -84,7 +84,7 @@
8484
HAL_StatusTypeDef HAL_Init(void);
8585

8686
#if !defined (HSE_VALUE)
87-
#define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
87+
#define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz */
8888
#endif /* HSE_VALUE */
8989

9090
#if !defined (HSI_VALUE)
@@ -108,15 +108,6 @@ HAL_StatusTypeDef HAL_Init(void);
108108
*/
109109

110110
/************************* Miscellaneous Configuration ************************/
111-
/*!< Uncomment the following line if you need to use external SRAM or SDRAM mounted
112-
on EVAL board as data memory */
113-
/* #define DATA_IN_ExtSRAM */
114-
/* #define DATA_IN_ExtSDRAM */
115-
116-
#if defined(DATA_IN_ExtSRAM) && defined(DATA_IN_ExtSDRAM)
117-
#error "Please select DATA_IN_ExtSRAM or DATA_IN_ExtSDRAM "
118-
#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
119-
120111
/*!< Uncomment the following line if you need to relocate your vector Table in
121112
Internal SRAM. */
122113
/* #define VECT_TAB_SRAM */
@@ -133,7 +124,7 @@ HAL_StatusTypeDef HAL_Init(void);
133124
*/
134125

135126
/* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */
136-
#define USE_PLL_HSE_EXTC (1) /* Use external clock --> NOT USED ON THIS BOARD */
127+
#define USE_PLL_HSE_EXTC (1) /* Use external clock */
137128
#define USE_PLL_HSE_XTAL (1) /* Use external xtal */
138129

139130
/**
@@ -162,10 +153,6 @@ const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8,
162153
/** @addtogroup STM32F7xx_System_Private_FunctionPrototypes
163154
* @{
164155
*/
165-
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
166-
static void SystemInit_ExtMemCtl(void);
167-
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
168-
169156
#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
170157
uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
171158
#endif
@@ -212,10 +199,6 @@ void SystemInit(void)
212199
/* Disable all interrupts */
213200
RCC->CIR = 0x00000000;
214201

215-
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
216-
SystemInit_ExtMemCtl();
217-
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
218-
219202
/* Configure the Vector Table location add offset address ------------------*/
220203
#ifdef VECT_TAB_SRAM
221204
SCB->VTOR = SRAM1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
@@ -324,231 +307,6 @@ void SystemCoreClockUpdate(void)
324307
SystemCoreClock >>= tmp;
325308
}
326309

327-
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
328-
/**
329-
* @brief Setup the external memory controller.
330-
* Called in startup_stm32f7xx.s before jump to main.
331-
* This function configures the external memories (SRAM/SDRAM)
332-
* This SRAM/SDRAM will be used as program data memory (including heap and stack).
333-
* @param None
334-
* @retval None
335-
*/
336-
void SystemInit_ExtMemCtl(void)
337-
{
338-
__IO uint32_t tmp = 0;
339-
#if defined (DATA_IN_ExtSDRAM)
340-
register uint32_t tmpreg = 0, timeout = 0xFFFF;
341-
register uint32_t index;
342-
343-
/* Enable GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
344-
clock */
345-
RCC->AHB1ENR |= 0x000001F8;
346-
347-
/* Delay after an RCC peripheral clock enabling */
348-
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);
349-
350-
/* Connect PDx pins to FMC Alternate function */
351-
GPIOD->AFR[0] = 0x000000CC;
352-
GPIOD->AFR[1] = 0xCC000CCC;
353-
/* Configure PDx pins in Alternate function mode */
354-
GPIOD->MODER = 0xA02A000A;
355-
/* Configure PDx pins speed to 50 MHz */
356-
GPIOD->OSPEEDR = 0xA02A000A;
357-
/* Configure PDx pins Output type to push-pull */
358-
GPIOD->OTYPER = 0x00000000;
359-
/* No pull-up, pull-down for PDx pins */
360-
GPIOD->PUPDR = 0x50150005;
361-
362-
/* Connect PEx pins to FMC Alternate function */
363-
GPIOE->AFR[0] = 0xC00000CC;
364-
GPIOE->AFR[1] = 0xCCCCCCCC;
365-
/* Configure PEx pins in Alternate function mode */
366-
GPIOE->MODER = 0xAAAA800A;
367-
/* Configure PEx pins speed to 50 MHz */
368-
GPIOE->OSPEEDR = 0xAAAA800A;
369-
/* Configure PEx pins Output type to push-pull */
370-
GPIOE->OTYPER = 0x00000000;
371-
/* No pull-up, pull-down for PEx pins */
372-
GPIOE->PUPDR = 0x55554005;
373-
374-
/* Connect PFx pins to FMC Alternate function */
375-
GPIOF->AFR[0] = 0x00CCCCCC;
376-
GPIOF->AFR[1] = 0xCCCCC000;
377-
/* Configure PFx pins in Alternate function mode */
378-
GPIOF->MODER = 0xAA800AAA;
379-
/* Configure PFx pins speed to 50 MHz */
380-
GPIOF->OSPEEDR = 0xAA800AAA;
381-
/* Configure PFx pins Output type to push-pull */
382-
GPIOF->OTYPER = 0x00000000;
383-
/* No pull-up, pull-down for PFx pins */
384-
GPIOF->PUPDR = 0x55400555;
385-
386-
/* Connect PGx pins to FMC Alternate function */
387-
GPIOG->AFR[0] = 0x00CC00CC;
388-
GPIOG->AFR[1] = 0xC000000C;
389-
/* Configure PGx pins in Alternate function mode */
390-
GPIOG->MODER = 0x80020A0A;
391-
/* Configure PGx pins speed to 50 MHz */
392-
GPIOG->OSPEEDR = 0x80020A0A;
393-
/* Configure PGx pins Output type to push-pull */
394-
GPIOG->OTYPER = 0x00000000;
395-
/* No pull-up, pull-down for PGx pins */
396-
GPIOG->PUPDR = 0x40010505;
397-
398-
/* Connect PHx pins to FMC Alternate function */
399-
GPIOH->AFR[0] = 0x00C0CC00;
400-
GPIOH->AFR[1] = 0xCCCCCCCC;
401-
/* Configure PHx pins in Alternate function mode */
402-
GPIOH->MODER = 0xAAAA08A0;
403-
/* Configure PHx pins speed to 50 MHz */
404-
GPIOH->OSPEEDR = 0xAAAA08A0;
405-
/* Configure PHx pins Output type to push-pull */
406-
GPIOH->OTYPER = 0x00000000;
407-
/* No pull-up, pull-down for PHx pins */
408-
GPIOH->PUPDR = 0x55550450;
409-
410-
/* Connect PIx pins to FMC Alternate function */
411-
GPIOI->AFR[0] = 0xCCCCCCCC;
412-
GPIOI->AFR[1] = 0x00000CC0;
413-
/* Configure PIx pins in Alternate function mode */
414-
GPIOI->MODER = 0x0028AAAA;
415-
/* Configure PIx pins speed to 50 MHz */
416-
GPIOI->OSPEEDR = 0x0028AAAA;
417-
/* Configure PIx pins Output type to push-pull */
418-
GPIOI->OTYPER = 0x00000000;
419-
/* No pull-up, pull-down for PIx pins */
420-
GPIOI->PUPDR = 0x00145555;
421-
422-
/*-- FMC Configuration ------------------------------------------------------*/
423-
/* Enable the FMC interface clock */
424-
RCC->AHB3ENR |= 0x00000001;
425-
426-
/* Delay after an RCC peripheral clock enabling */
427-
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
428-
429-
/* Configure and enable SDRAM bank1 */
430-
FMC_Bank5_6->SDCR[0] = 0x000019E5;
431-
FMC_Bank5_6->SDTR[0] = 0x01116361;
432-
433-
/* SDRAM initialization sequence */
434-
/* Clock enable command */
435-
FMC_Bank5_6->SDCMR = 0x00000011;
436-
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
437-
while((tmpreg != 0) && (timeout-- > 0))
438-
{
439-
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
440-
}
441-
442-
/* Delay */
443-
for (index = 0; index<1000; index++);
444-
445-
/* PALL command */
446-
FMC_Bank5_6->SDCMR = 0x00000012;
447-
timeout = 0xFFFF;
448-
while((tmpreg != 0) && (timeout-- > 0))
449-
{
450-
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
451-
}
452-
453-
/* Auto refresh command */
454-
FMC_Bank5_6->SDCMR = 0x000000F3;
455-
timeout = 0xFFFF;
456-
while((tmpreg != 0) && (timeout-- > 0))
457-
{
458-
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
459-
}
460-
461-
/* MRD register program */
462-
FMC_Bank5_6->SDCMR = 0x00046014;
463-
timeout = 0xFFFF;
464-
while((tmpreg != 0) && (timeout-- > 0))
465-
{
466-
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
467-
}
468-
469-
/* Set refresh count */
470-
tmpreg = FMC_Bank5_6->SDRTR;
471-
FMC_Bank5_6->SDRTR = (tmpreg | (0x00000603<<1));
472-
473-
/* Disable write protection */
474-
tmpreg = FMC_Bank5_6->SDCR[0];
475-
FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
476-
#endif /* DATA_IN_ExtSDRAM */
477-
478-
#if defined(DATA_IN_ExtSRAM)
479-
/*-- GPIOs Configuration -----------------------------------------------------*/
480-
/* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
481-
RCC->AHB1ENR |= 0x00000078;
482-
483-
/* Delay after an RCC peripheral clock enabling */
484-
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);
485-
486-
/* Connect PDx pins to FMC Alternate function */
487-
GPIOD->AFR[0] = 0x00CCC0CC;
488-
GPIOD->AFR[1] = 0xCCCCCCCC;
489-
/* Configure PDx pins in Alternate function mode */
490-
GPIOD->MODER = 0xAAAA0A8A;
491-
/* Configure PDx pins speed to 100 MHz */
492-
GPIOD->OSPEEDR = 0xFFFF0FCF;
493-
/* Configure PDx pins Output type to push-pull */
494-
GPIOD->OTYPER = 0x00000000;
495-
/* No pull-up, pull-down for PDx pins */
496-
GPIOD->PUPDR = 0x55550545;
497-
498-
/* Connect PEx pins to FMC Alternate function */
499-
GPIOE->AFR[0] = 0xC00CC0CC;
500-
GPIOE->AFR[1] = 0xCCCCCCCC;
501-
/* Configure PEx pins in Alternate function mode */
502-
GPIOE->MODER = 0xAAAA828A;
503-
/* Configure PEx pins speed to 100 MHz */
504-
GPIOE->OSPEEDR = 0xFFFFC3CF;
505-
/* Configure PEx pins Output type to push-pull */
506-
GPIOE->OTYPER = 0x00000000;
507-
/* No pull-up, pull-down for PEx pins */
508-
GPIOE->PUPDR = 0x55554145;
509-
510-
/* Connect PFx pins to FMC Alternate function */
511-
GPIOF->AFR[0] = 0x00CCCCCC;
512-
GPIOF->AFR[1] = 0xCCCC0000;
513-
/* Configure PFx pins in Alternate function mode */
514-
GPIOF->MODER = 0xAA000AAA;
515-
/* Configure PFx pins speed to 100 MHz */
516-
GPIOF->OSPEEDR = 0xFF000FFF;
517-
/* Configure PFx pins Output type to push-pull */
518-
GPIOF->OTYPER = 0x00000000;
519-
/* No pull-up, pull-down for PFx pins */
520-
GPIOF->PUPDR = 0x55000555;
521-
522-
/* Connect PGx pins to FMC Alternate function */
523-
GPIOG->AFR[0] = 0x00CCCCCC;
524-
GPIOG->AFR[1] = 0x000000C0;
525-
/* Configure PGx pins in Alternate function mode */
526-
GPIOG->MODER = 0x00200AAA;
527-
/* Configure PGx pins speed to 100 MHz */
528-
GPIOG->OSPEEDR = 0x00300FFF;
529-
/* Configure PGx pins Output type to push-pull */
530-
GPIOG->OTYPER = 0x00000000;
531-
/* No pull-up, pull-down for PGx pins */
532-
GPIOG->PUPDR = 0x00100555;
533-
534-
/*-- FMC/FSMC Configuration --------------------------------------------------*/
535-
/* Enable the FMC/FSMC interface clock */
536-
RCC->AHB3ENR |= 0x00000001;
537-
538-
/* Delay after an RCC peripheral clock enabling */
539-
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
540-
541-
/* Configure and enable Bank1_SRAM2 */
542-
FMC_Bank1->BTCR[4] = 0x00001091;
543-
FMC_Bank1->BTCR[5] = 0x00110212;
544-
FMC_Bank1E->BWTR[4] = 0x0FFFFFFF;
545-
546-
#endif /* DATA_IN_ExtSRAM */
547-
548-
(void)(tmp);
549-
}
550-
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
551-
552310
/**
553311
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
554312
* AHB/APBx prescalers and Flash settings
@@ -581,7 +339,7 @@ void SetSysClock(void)
581339
}
582340

583341
// Output clock on MCO2 pin(PC9) for debugging purpose
584-
// Can be visualized on uSD card CN3 connector pin 8
342+
// Can be visualized on CN8 connector pin 4
585343
//HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4); // 216 MHz / 4 = 54 MHz
586344
}
587345

‎libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F746ZG/PeripheralPins.c

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ const PinMap PinMap_ADC[] = {
4444
{PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 - ARDUINO A0
4545
// {PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 (used by ethernet)
4646
// {PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 (used by ethernet)
47-
{PA_3, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
47+
{PA_3, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN2
4848
{PA_4, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
4949
{PA_5, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 - ARDUINO D13
5050
{PA_6, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 - ARDUINO D12
@@ -119,10 +119,10 @@ const PinMap PinMap_PWM[] = {
119119
// {PA_5, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
120120
{PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
121121
// {PA_6, PWM_13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
122-
{PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N (remove JP6 to use it)
123-
// {PA_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 (remove JP6 to use it)
124-
// {PA_7, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N (remove JP6 to use it)
125-
// {PA_7, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 (remove JP6 to use it)
122+
// {PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N (used by ethernet)
123+
// {PA_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 (used by ethernet)
124+
// {PA_7, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N (used by ethernet)
125+
// {PA_7, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 (used by ethernet)
126126
{PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
127127
// {PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 (used by USB)
128128
// {PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 (used by USB)
@@ -176,6 +176,7 @@ const PinMap PinMap_PWM[] = {
176176
{PE_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
177177
{PE_12, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
178178
{PE_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
179+
{PE_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
179180

180181
{PF_6, PWM_10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
181182
{PF_7, PWM_11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
@@ -214,8 +215,8 @@ const PinMap PinMap_UART_RX[] = {
214215
// {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // (used by LED2)
215216
{PB_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
216217
{PC_7, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
217-
{PC_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
218-
// {PC_11, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
218+
// {PC_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
219+
{PC_11, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
219220
{PD_2, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
220221
{PD_6, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
221222
{PD_9, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // STDIO_RX

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