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STM32L4 USB: add patch in CubeL4 hal driver
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4 files changed

+339
-66
lines changed

4 files changed

+339
-66
lines changed

‎targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_pcd.c

Lines changed: 159 additions & 62 deletions
Original file line numberDiff line numberDiff line change
@@ -113,6 +113,7 @@
113113
*/
114114
#if defined (USB_OTG_FS)
115115
static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum);
116+
static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd); // MBED PATCH
116117
#endif /* USB_OTG_FS */
117118
#if defined (USB)
118119
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd);
@@ -162,11 +163,9 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
162163
{
163164
/* Allocate lock resource and initialize it */
164165
hpcd->Lock = HAL_UNLOCKED;
165-
166-
// Added for MBED PR #3062
167-
for (index = 0; index < hpcd->Init.dev_endpoints ; index++)
168-
hpcd->EPLock[index].Lock = HAL_UNLOCKED;
169-
166+
for (index = 0; index < hpcd->Init.dev_endpoints ; index++) { // MBED PATCH
167+
hpcd->EPLock[index].Lock = HAL_UNLOCKED;
168+
}
170169
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
171170
HAL_PCD_MspInit(hpcd);
172171
}
@@ -311,10 +310,10 @@ __weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd)
311310
*/
312311
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
313312
{
314-
__HAL_LOCK(hpcd);
313+
// MBED PATCH __HAL_LOCK(hpcd);
315314
USB_DevConnect (hpcd->Instance);
316315
__HAL_PCD_ENABLE(hpcd);
317-
__HAL_UNLOCK(hpcd);
316+
// MBED PATCH __HAL_UNLOCK(hpcd);
318317
return HAL_OK;
319318
}
320319

@@ -325,13 +324,14 @@ HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
325324
*/
326325
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd)
327326
{
328-
__HAL_LOCK(hpcd);
327+
// MBED PATCH __HAL_LOCK(hpcd);
329328
__HAL_PCD_DISABLE(hpcd);
330329
USB_StopDevice(hpcd->Instance);
331330
USB_DevDisconnect (hpcd->Instance);
332-
__HAL_UNLOCK(hpcd);
331+
// MBED PATCH __HAL_UNLOCK(hpcd);
333332
return HAL_OK;
334333
}
334+
335335
#if defined (USB_OTG_FS)
336336
/**
337337
* @brief Handles PCD interrupt request.
@@ -431,6 +431,13 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
431431
}
432432
}
433433

434+
// MBED PATCH
435+
if (( epint & USB_OTG_DOEPINT_EPDISD) == USB_OTG_DOEPINT_EPDISD)
436+
{
437+
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_EPDISD);
438+
}
439+
// MBED PATCH
440+
434441
if(( epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP)
435442
{
436443
/* Inform the upper layer that a setup packet is available */
@@ -473,8 +480,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
473480
{
474481
fifoemptymsk = 0x1 << epnum;
475482

476-
// Added for MBED PR #3062
477-
atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk);
483+
atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); // MBED PATCH
478484

479485
CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_XFRC);
480486

@@ -690,27 +696,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
690696
/* Handle RxQLevel Interrupt */
691697
if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
692698
{
693-
USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
694-
695-
temp = USBx->GRXSTSP;
696-
697-
ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM];
698-
699-
if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT)
700-
{
701-
if((temp & USB_OTG_GRXSTSP_BCNT) != 0)
702-
{
703-
USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4);
704-
ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
705-
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
706-
}
707-
}
708-
else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT)
709-
{
710-
USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8);
711-
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
712-
}
713-
USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
699+
PCD_ReadRxFifo(hpcd); // MBED PATCH
714700
}
715701

716702
/* Handle SOF Interrupt */
@@ -1135,9 +1121,11 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint
11351121
ep->maxpacket = ep_mps;
11361122
ep->type = ep_type;
11371123

1138-
__HAL_LOCK(hpcd);
1124+
// MBED PATCH __HAL_LOCK(hpcd);
1125+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7FU]); // MBED PATCH
11391126
USB_ActivateEndpoint(hpcd->Instance , ep);
1140-
__HAL_UNLOCK(hpcd);
1127+
// MBED PATCH __HAL_UNLOCK(hpcd);
1128+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7FU]); // MBED PATCH
11411129
return ret;
11421130

11431131
}
@@ -1165,9 +1153,11 @@ HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
11651153

11661154
ep->is_in = (0x80 & ep_addr) != 0;
11671155

1168-
__HAL_LOCK(hpcd);
1156+
// MBED PATCH __HAL_LOCK(hpcd);
1157+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7FU]); // MBED PATCH
11691158
USB_DeactivateEndpoint(hpcd->Instance , ep);
1170-
__HAL_UNLOCK(hpcd);
1159+
// MBED PATCH __HAL_UNLOCK(hpcd);
1160+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7FU]); // MBED PATCH
11711161
return HAL_OK;
11721162
}
11731163

@@ -1193,8 +1183,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, u
11931183
ep->is_in = 0;
11941184
ep->num = ep_addr & 0x7F;
11951185

1196-
// Added for MBED PR #3062
1197-
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1186+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
11981187

11991188
if ((ep_addr & 0x7F) == 0 )
12001189
{
@@ -1205,8 +1194,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, u
12051194
USB_EPStartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable);
12061195
}
12071196

1208-
// Added for MBED PR #3062
1209-
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1197+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
12101198

12111199
return HAL_OK;
12121200
}
@@ -1242,9 +1230,8 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
12421230
ep->is_in = 1;
12431231
ep->num = ep_addr & 0x7F;
12441232

1245-
// Added for MBED PR #3062
1246-
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1247-
1233+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
1234+
12481235
if ((ep_addr & 0x7F) == 0 )
12491236
{
12501237
USB_EP0StartXfer(hpcd->Instance,ep, hpcd->Init.dma_enable);
@@ -1254,12 +1241,91 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
12541241
USB_EPStartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable);
12551242
}
12561243

1257-
// Added for MBED PR #3062
1258-
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1259-
1244+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
1245+
12601246
return HAL_OK;
12611247
}
12621248

1249+
// MBED PATCH
1250+
/**
1251+
* @brief Abort a transaction.
1252+
* @param hpcd: PCD handle
1253+
* @param ep_addr: endpoint address
1254+
* @retval HAL status
1255+
*/
1256+
HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
1257+
{
1258+
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
1259+
HAL_StatusTypeDef ret = HAL_OK;
1260+
USB_OTG_EPTypeDef *ep;
1261+
1262+
if ((0x80 & ep_addr) == 0x80)
1263+
{
1264+
ep = &hpcd->IN_ep[ep_addr & 0x7F];
1265+
}
1266+
else
1267+
{
1268+
ep = &hpcd->OUT_ep[ep_addr];
1269+
}
1270+
1271+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1272+
1273+
ep->num = ep_addr & 0x7F;
1274+
ep->is_in = ((ep_addr & 0x80) == 0x80);
1275+
1276+
USB_EPSetNak(hpcd->Instance, ep);
1277+
1278+
if ((0x80 & ep_addr) == 0x80)
1279+
{
1280+
ret = USB_EPStopXfer(hpcd->Instance , ep);
1281+
if (ret == HAL_OK)
1282+
{
1283+
ret = USB_FlushTxFifo(hpcd->Instance, ep_addr & 0x7F);
1284+
}
1285+
}
1286+
else
1287+
{
1288+
/* Set global NAK */
1289+
USBx_DEVICE->DCTL |= USB_OTG_DCTL_SGONAK;
1290+
1291+
/* Read all entries from the fifo so global NAK takes effect */
1292+
while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
1293+
{
1294+
PCD_ReadRxFifo(hpcd);
1295+
}
1296+
1297+
/* Stop the transfer */
1298+
ret = USB_EPStopXfer(hpcd->Instance , ep);
1299+
if (ret == HAL_BUSY)
1300+
{
1301+
/* If USB_EPStopXfer returns HAL_BUSY then a setup packet
1302+
* arrived after the rx fifo was processed but before USB_EPStopXfer
1303+
* was called. Process the rx fifo one more time to read the
1304+
* setup packet.
1305+
*
1306+
* Note - after the setup packet has been received no further
1307+
* packets will be received over USB. This is because the next
1308+
* phase (data or status) of the control transfer started by
1309+
* the setup packet will be naked until global nak is cleared.
1310+
*/
1311+
while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
1312+
{
1313+
PCD_ReadRxFifo(hpcd);
1314+
}
1315+
1316+
ret = USB_EPStopXfer(hpcd->Instance , ep);
1317+
}
1318+
1319+
/* Clear global nak */
1320+
USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK;
1321+
}
1322+
1323+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1324+
1325+
return ret;
1326+
}
1327+
// MBED PATCH
1328+
12631329
/**
12641330
* @brief Set a STALL condition over an endpoint.
12651331
* @param hpcd: PCD handle
@@ -1283,17 +1349,15 @@ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
12831349
ep->num = ep_addr & 0x7F;
12841350
ep->is_in = ((ep_addr & 0x80) == 0x80);
12851351

1286-
// Added for MBED PR #3062
1287-
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1352+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
12881353

12891354
USB_EPSetStall(hpcd->Instance , ep);
12901355
if((ep_addr & 0x7F) == 0)
12911356
{
12921357
USB_EP0_OutStart(hpcd->Instance, hpcd->Init.dma_enable, (uint8_t *)hpcd->Setup);
12931358
}
12941359

1295-
// Added for MBED PR #3062
1296-
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1360+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
12971361

12981362
return HAL_OK;
12991363
}
@@ -1321,13 +1385,11 @@ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
13211385
ep->num = ep_addr & 0x7F;
13221386
ep->is_in = ((ep_addr & 0x80) == 0x80);
13231387

1324-
// Added for MBED PR #3062
1325-
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1388+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
13261389

13271390
USB_EPClearStall(hpcd->Instance , ep);
13281391

1329-
// Added for MBED PR #3062
1330-
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1392+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
13311393

13321394
return HAL_OK;
13331395
}
@@ -1340,8 +1402,7 @@ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
13401402
*/
13411403
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
13421404
{
1343-
// Added for MBED PR #3062
1344-
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1405+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
13451406

13461407
if ((ep_addr & 0x80) == 0x80)
13471408
{
@@ -1352,9 +1413,8 @@ HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
13521413
USB_FlushRxFifo(hpcd->Instance);
13531414
}
13541415

1355-
// Added for MBED PR #3062
1356-
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1357-
1416+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
1417+
13581418
return HAL_OK;
13591419
}
13601420

@@ -1465,13 +1525,50 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t
14651525
if (ep->xfer_count >= ep->xfer_len)
14661526
{
14671527
fifoemptymsk = 0x1 << epnum;
1468-
// Added for MBED PR #3062
1469-
atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk);
1470-
1528+
atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); // MBED PATCH
14711529
}
14721530

14731531
return HAL_OK;
14741532
}
1533+
1534+
// MBED PATCH
1535+
/**
1536+
* @brief Process the next RX fifo entry
1537+
* @param hpcd: PCD handle
1538+
* @retval HAL status
1539+
*/
1540+
static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd)
1541+
{
1542+
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
1543+
USB_OTG_EPTypeDef *ep;
1544+
uint32_t temp = 0;
1545+
1546+
USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
1547+
1548+
temp = USBx->GRXSTSP;
1549+
1550+
ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM];
1551+
1552+
if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT)
1553+
{
1554+
if((temp & USB_OTG_GRXSTSP_BCNT) != 0U)
1555+
{
1556+
USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U);
1557+
ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U;
1558+
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U;
1559+
}
1560+
}
1561+
else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT)
1562+
{
1563+
USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U);
1564+
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U;
1565+
}
1566+
USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
1567+
1568+
return HAL_OK;
1569+
}
1570+
// MBED PATCH
1571+
14751572
#endif /* USB_OTG_FS */
14761573

14771574
#if defined (USB)

‎targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_pcd.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -329,6 +329,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint
329329
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
330330
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
331331
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
332+
HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); // MBED PATCH
332333
uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
333334
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
334335
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);

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