|
1 | 1 | {
|
2 |
| - "config" : { |
3 |
| - "cmsis_repo" : "https://github.com/ARM-software/CMSIS_5", |
4 |
| - "cmsis_branch" : "develop" |
5 |
| - }, |
6 | 2 | "files" : [
|
7 | 3 | {
|
8 |
| - "cmsis_file" : "CMSIS/Core/Template/ARMv8-M/tz_context.c", |
9 |
| - "mbed_file" : "platform/mbed_tz_context.c" |
| 4 | + "src_file" : "CMSIS/Core/Template/ARMv8-M/tz_context.c", |
| 5 | + "dest_file" : "cmsis/TARGET_CORTEX_M/mbed_tz_context.c" |
10 | 6 | },
|
11 | 7 | {
|
12 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Config/handlers.c", |
13 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Config/TARGET_CORTEX_A/handlers.c" |
| 8 | + "src_file" : "CMSIS/RTOS2/RTX/Config/handlers.c", |
| 9 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Config/TARGET_CORTEX_A/handlers.c" |
14 | 10 | },
|
15 | 11 | {
|
16 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Config/RTX_Config.h", |
17 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Config/RTX_Config.h" |
| 12 | + "src_file" : "CMSIS/RTOS2/RTX/Config/RTX_Config.h", |
| 13 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Config/RTX_Config.h" |
18 | 14 | },
|
19 | 15 | {
|
20 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Config/RTX_Config.c", |
21 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Config/RTX_Config.c" |
| 16 | + "src_file" : "CMSIS/RTOS2/RTX/Config/RTX_Config.c", |
| 17 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Config/RTX_Config.c" |
22 | 18 | },
|
23 | 19 | {
|
24 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.S", |
25 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M0/irq_cm0.S" |
| 20 | + "src_file" : "CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.S", |
| 21 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M0/irq_cm0.S" |
26 | 22 | },
|
27 | 23 | {
|
28 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.S", |
29 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M0P/irq_cm0.S" |
| 24 | + "src_file" : "CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.S", |
| 25 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M0P/irq_cm0.S" |
30 | 26 | },
|
31 | 27 | {
|
32 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.S", |
33 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M23/irq_armv8mbl.S" |
| 28 | + "src_file" : "CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.S", |
| 29 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M23/irq_armv8mbl.S" |
34 | 30 | },
|
35 | 31 | {
|
36 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.S", |
37 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M3/irq_cm3.S" |
| 32 | + "src_file" : "CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.S", |
| 33 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M3/irq_cm3.S" |
38 | 34 | },
|
39 | 35 | {
|
40 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.S", |
41 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M33/irq_armv8mml.S" |
| 36 | + "src_file" : "CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.S", |
| 37 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M33/irq_armv8mml.S" |
42 | 38 | },
|
43 | 39 | {
|
44 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.S", |
45 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_RTOS_M4_M7/irq_cm4f.S" |
| 40 | + "src_file" : "CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.S", |
| 41 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_RTOS_M4_M7/irq_cm4f.S" |
46 | 42 | },
|
47 | 43 | {
|
48 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/ARM/irq_ca.S", |
49 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_CORTEX_A/irq_ca.S" |
| 44 | + "src_file" : "CMSIS/RTOS2/RTX/Source/ARM/irq_ca.S", |
| 45 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_CORTEX_A/irq_ca.S" |
50 | 46 | },
|
51 | 47 | {
|
52 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S", |
53 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M0/irq_cm0.S" |
| 48 | + "src_file" : "CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S", |
| 49 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M0/irq_cm0.S" |
54 | 50 | },
|
55 | 51 | {
|
56 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S", |
57 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M0P/irq_cm0.S" |
| 52 | + "src_file" : "CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S", |
| 53 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M0P/irq_cm0.S" |
58 | 54 | },
|
59 | 55 | {
|
60 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S", |
61 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M23/irq_armv8mbl.S" |
| 56 | + "src_file" : "CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S", |
| 57 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M23/irq_armv8mbl.S" |
62 | 58 | },
|
63 | 59 | {
|
64 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S", |
65 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M3/irq_cm3.S" |
| 60 | + "src_file" : "CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S", |
| 61 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M3/irq_cm3.S" |
66 | 62 | },
|
67 | 63 | {
|
68 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S", |
69 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M33/irq_armv8mml.S" |
| 64 | + "src_file" : "CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S", |
| 65 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M33/irq_armv8mml.S" |
70 | 66 | },
|
71 | 67 | {
|
72 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S", |
73 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_RTOS_M4_M7/irq_cm4f.S" |
| 68 | + "src_file" : "CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S", |
| 69 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_RTOS_M4_M7/irq_cm4f.S" |
74 | 70 | },
|
75 | 71 | {
|
76 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S", |
77 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_CORTEX_A/irq_ca.S" |
| 72 | + "src_file" : "CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S", |
| 73 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_CORTEX_A/irq_ca.S" |
78 | 74 | },
|
79 | 75 | {
|
80 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.S", |
81 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_IAR/TARGET_M0/irq_cm0.S" |
| 76 | + "src_file" : "CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.S", |
| 77 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_IAR/TARGET_M0/irq_cm0.S" |
82 | 78 | },
|
83 | 79 | {
|
84 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.S", |
85 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_IAR/TARGET_M0P/irq_cm0.S" |
| 80 | + "src_file" : "CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.S", |
| 81 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_IAR/TARGET_M0P/irq_cm0.S" |
86 | 82 | },
|
87 | 83 | {
|
88 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_common.S", |
89 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_IAR/TARGET_M23/irq_armv8mbl_common.S" |
| 84 | + "src_file" : "CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_common.S", |
| 85 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_IAR/TARGET_M23/irq_armv8mbl_common.S" |
90 | 86 | },
|
91 | 87 | {
|
92 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.S", |
93 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_IAR/TARGET_M3/irq_cm3.S" |
| 88 | + "src_file" : "CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.S", |
| 89 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_IAR/TARGET_M3/irq_cm3.S" |
94 | 90 | },
|
95 | 91 | {
|
96 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_common.S", |
97 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_IAR/TARGET_M33/irq_armv8mml_common.S" |
| 92 | + "src_file" : "CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_common.S", |
| 93 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_IAR/TARGET_M33/irq_armv8mml_common.S" |
98 | 94 | },
|
99 | 95 | {
|
100 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.S", |
101 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_IAR/TARGET_RTOS_M4_M7/irq_cm4f.S" |
| 96 | + "src_file" : "CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.S", |
| 97 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_IAR/TARGET_RTOS_M4_M7/irq_cm4f.S" |
102 | 98 | },
|
103 | 99 | {
|
104 |
| - "cmsis_file" : "CMSIS/RTOS2/RTX/Source/IAR/irq_ca.S", |
105 |
| - "mbed_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_IAR/TARGET_CORTEX_A/irq_ca.S" |
| 100 | + "src_file" : "CMSIS/RTOS2/RTX/Source/IAR/irq_ca.S", |
| 101 | + "dest_file" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_IAR/TARGET_CORTEX_A/irq_ca.S" |
106 | 102 | }
|
107 | 103 | ],
|
108 | 104 | "folders" : [
|
109 | 105 | {
|
110 |
| - "cmsis_folder" : "CMSIS/Core/Include/", |
111 |
| - "mbed_folder" : "cmsis/TARGET_CORTEX_M/" |
| 106 | + "src_folder" : "CMSIS/Core/Include/", |
| 107 | + "dest_folder" : "cmsis/TARGET_CORTEX_M/" |
112 | 108 | },
|
113 | 109 | {
|
114 |
| - "cmsis_folder" : "CMSIS/RTOS2/Include/", |
115 |
| - "mbed_folder" : "rtos/TARGET_CORTEX/rtx5/Include/" |
| 110 | + "src_folder" : "CMSIS/RTOS2/Include/", |
| 111 | + "dest_folder" : "rtos/TARGET_CORTEX/rtx5/Include/" |
116 | 112 | },
|
117 | 113 | {
|
118 |
| - "cmsis_folder" : "CMSIS/RTOS2/RTX/Include1/", |
119 |
| - "mbed_folder" : "rtos/TARGET_CORTEX/rtx4/" |
| 114 | + "src_folder" : "CMSIS/RTOS2/RTX/Include1/", |
| 115 | + "dest_folder" : "rtos/TARGET_CORTEX/rtx4/" |
120 | 116 | },
|
121 | 117 | {
|
122 |
| - "cmsis_folder" : "CMSIS/RTOS2/RTX/Include/", |
123 |
| - "mbed_folder" : "rtos/TARGET_CORTEX/rtx5/RTX/Include/" |
| 118 | + "src_folder" : "CMSIS/RTOS2/RTX/Include/", |
| 119 | + "dest_folder" : "rtos/TARGET_CORTEX/rtx5/RTX/Include/" |
124 | 120 | },
|
125 | 121 | {
|
126 |
| - "cmsis_folder" : "CMSIS/RTOS2/RTX/Source/", |
127 |
| - "mbed_folder" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/" |
| 122 | + "src_folder" : "CMSIS/RTOS2/RTX/Source/", |
| 123 | + "dest_folder" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/" |
128 | 124 | },
|
129 | 125 | {
|
130 |
| - "cmsis_folder" : "CMSIS/RTOS2/RTX/Source/", |
131 |
| - "mbed_folder" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/" |
| 126 | + "src_folder" : "CMSIS/RTOS2/RTX/Source/", |
| 127 | + "dest_folder" : "rtos/TARGET_CORTEX/rtx5/RTX/Source/" |
132 | 128 | },
|
133 | 129 | {
|
134 |
| - "cmsis_folder" : "CMSIS/Core_A/Include/", |
135 |
| - "mbed_folder" : "cmsis/TARGET_CORTEX_A/" |
| 130 | + "src_folder" : "CMSIS/Core_A/Include/", |
| 131 | + "dest_folder" : "cmsis/TARGET_CORTEX_A/" |
136 | 132 | },
|
137 | 133 | {
|
138 |
| - "cmsis_folder" : "CMSIS/Core_A/Source/", |
139 |
| - "mbed_folder" : "cmsis/TARGET_CORTEX_A/" |
| 134 | + "src_folder" : "CMSIS/Core_A/Source/", |
| 135 | + "dest_folder" : "cmsis/TARGET_CORTEX_A/" |
140 | 136 | }
|
141 | 137 | ],
|
142 |
| - "Mbed_sha" : [ |
| 138 | + "commit_sha" : [ |
143 | 139 | "428acae1b2ac15c3ad523e8d40755a9301220822",
|
144 | 140 | "d9d622afe0ca8c7ab9d24c17f9fe59b54dcc61c9",
|
145 | 141 | "a1fcd36be8ee00aba2c9c1b079f5728368922bc8",
|
146 | 142 | "f3db103d481d8729950414868cfc8123b8055601",
|
147 | 143 | "c07cc6b0f42ff4fe215aa1641a043e205d9128a5",
|
148 | 144 | "dd8fdf4c768e5fef3a7ce2e014de4339dbafe5ce",
|
149 |
| - "2a837ea97900cc30f82e5a23b95b3f293d17eae1" |
| 145 | + "2a837ea97900cc30f82e5a23b95b3f293d17eae1", |
| 146 | + "c03b3f9eedab7cb0732d1519c4f1a8d90b08eede", |
| 147 | + "314a9eb559752132a89b0dbd986db960b3ab9055", |
| 148 | + "e83fd0099a69e6eb865e4e6fcadbfb1328c04c85", |
| 149 | + "a019acaf8d6fb1f0512414d072f667cc2749b1d9", |
| 150 | + "a884fdc0639ae4e17299838ec9de4fddd83cf93c", |
| 151 | + "6c827cb5879bc096e45efd992dfadcb96c1d50bc" |
150 | 152 | ]
|
151 | 153 | }
|
152 | 154 |
|
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