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Cruz Monrreal
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Merge pull request #6555 from c1728p9/st_usb
Update the STM32 USB driver to the new API
2 parents 38a5685 + 3ff1e05 commit 451b09d

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8 files changed

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-1
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8 files changed

+747
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targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1042,6 +1042,28 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
10421042
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);
10431043
return HAL_OK;
10441044
}
1045+
/**
1046+
* @brief Abort a transaction.
1047+
* @param hpcd: PCD handle
1048+
* @param ep_addr: endpoint address
1049+
* @param pBuf: pointer to the transmission buffer
1050+
* @param len: amount of data to be sent
1051+
* @retval HAL status
1052+
*/
1053+
HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
1054+
{
1055+
HAL_StatusTypeDef ret;
1056+
USB_OTG_EPTypeDef *ep;
1057+
1058+
ep = &hpcd->IN_ep[ep_addr & 0x7F];
1059+
1060+
/*setup and start the Xfer */
1061+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1062+
ret = USB_EPStopXfer(hpcd->Instance , ep, hpcd->Init.dma_enable);
1063+
1064+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1065+
return ret;
1066+
}
10451067

10461068
/**
10471069
* @brief Set a STALL condition over an endpoint.

targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -271,6 +271,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint
271271
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
272272
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
273273
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
274+
HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
274275
uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
275276
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
276277
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);

targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c

Lines changed: 55 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -745,6 +745,61 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD
745745
}
746746
return HAL_OK;
747747
}
748+
/**
749+
* @brief USB_EPStoptXfer : setup and starts a transfer over an EP
750+
* @param USBx : Selected device
751+
* @param ep: pointer to endpoint structure
752+
* @param dma: USB dma enabled or disabled
753+
* This parameter can be one of these values:
754+
* 0 : DMA feature not used
755+
* 1 : DMA feature used
756+
* @retval HAL status
757+
*/
758+
HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma)
759+
{
760+
HAL_StatusTypeDef ret = HAL_OK;
761+
/* IN endpoint */
762+
if (ep->is_in == 1U)
763+
{
764+
765+
/* EP enable, IN data in FIFO */
766+
if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
767+
{
768+
volatile uint32_t loop=0;
769+
USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_EPDIS);
770+
while(((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
771+
{/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised
772+
to consider the endpoint as disable */
773+
/* fix me loop for test only */
774+
loop++;
775+
if (loop > 10000L) {
776+
ret =HAL_ERROR;
777+
break;
778+
}
779+
}
780+
}
781+
}
782+
else /* OUT endpoint */
783+
{
784+
if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
785+
{
786+
volatile uint32_t loop=0;
787+
USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_EPDIS);
788+
while(((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
789+
{/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised
790+
to consider the endpoint as disable */
791+
/* Fix me loop for test only */
792+
loop++;
793+
if (loop > 10000L) {
794+
ret =HAL_ERROR;
795+
break;
796+
}
797+
}
798+
}
799+
}
800+
return ret;
801+
}
802+
748803

749804
/**
750805
* @brief USB_WritePacket : Writes a packet into the Tx FIFO associated

targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -404,6 +404,7 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP
404404
HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
405405
HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
406406
HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
407+
HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
407408
HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
408409
HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma);
409410
void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);

targets/targets.json

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -948,7 +948,7 @@
948948
},
949949
"detect_code": ["0835"],
950950
"macros_add": ["USBHOST_OTHER"],
951-
"device_has_add": ["ANALOGOUT", "CAN", "EMAC", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
951+
"device_has_add": ["ANALOGOUT", "CAN", "EMAC", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH", "USBDEVICE"],
952952
"device_has_remove": ["LPTICKER"],
953953
"features": ["LWIP"],
954954
"release_versions": ["2", "5"],
Lines changed: 65 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,65 @@
1+
/* mbed Microcontroller Library
2+
* Copyright (c) 2018-2018 ARM Limited
3+
*
4+
* Licensed under the Apache License, Version 2.0 (the "License");
5+
* you may not use this file except in compliance with the License.
6+
* You may obtain a copy of the License at
7+
*
8+
* http://www.apache.org/licenses/LICENSE-2.0
9+
*
10+
* Unless required by applicable law or agreed to in writing, software
11+
* distributed under the License is distributed on an "AS IS" BASIS,
12+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+
* See the License for the specific language governing permissions and
14+
* limitations under the License.
15+
*/
16+
17+
#define NUMBER_OF_LOGICAL_ENDPOINTS (4)
18+
#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2)
19+
20+
/* Define physical endpoint numbers */
21+
22+
/* Endpoint No. Type(s) MaxPacket DoubleBuffer */
23+
/* ---------------- ------------ ---------- --- */
24+
#define EP0OUT (0x00) /* Control 64 No */
25+
#define EP0IN (0x80) /* Control 64 No */
26+
#define EP1OUT (0x01) /* Int/Bulk/Iso 64/64/1023 Yes */
27+
#define EP1IN (0x81) /* Int/Bulk/Iso 64/64/1023 Yes */
28+
#define EP2OUT (0x02) /* Int/Bulk/Iso 64/64/1023 Yes */
29+
#define EP2IN (0x82) /* Int/Bulk/Iso 64/64/1023 Yes */
30+
#define EP3OUT (0x03) /* Int/Bulk/Iso 64/64/1023 Yes */
31+
#define EP3IN (0x83) /* Int/Bulk/Iso 64/64/1023 Yes */
32+
33+
/* Maximum Packet sizes */
34+
#define MAX_PACKET_SIZE_SETUP (48)
35+
#define MAX_PACKET_SIZE_EP0 (64)
36+
#define MAX_PACKET_SIZE_EP1 (64) /* Int/Bulk */
37+
#define MAX_PACKET_SIZE_EP2 (64) /* Int/Bulk */
38+
#define MAX_PACKET_SIZE_EP3 (200) /* Int/Bulk/iso (44100 stereo 16 bits) */
39+
40+
#define MAX_PACKET_SIZE_EP1_ISO (1023) /* Isochronous */
41+
#define MAX_PACKET_SIZE_EP2_ISO (1023) /* Isochronous */
42+
#define MAX_PACKET_SIZE_EP3_ISO (1023) /* Isochronous */
43+
44+
/* Generic endpoints - intended to be portable accross devices */
45+
/* and be suitable for simple USB devices. */
46+
47+
/* Bulk endpoint */
48+
#define EPBULK_OUT (EP2OUT)
49+
#define EPBULK_IN (EP2IN)
50+
#define EPBULK_OUT_callback EP2_OUT_callback
51+
#define EPBULK_IN_callback EP2_IN_callback
52+
/* Interrupt endpoint */
53+
#define EPINT_OUT (EP1OUT)
54+
#define EPINT_IN (EP1IN)
55+
#define EPINT_OUT_callback EP1_OUT_callback
56+
#define EPINT_IN_callback EP1_IN_callback
57+
/* Isochronous endpoint */
58+
#define EPISO_OUT (EP3OUT)
59+
#define EPISO_IN (EP3IN)
60+
#define EPISO_OUT_callback EP3_OUT_callback
61+
#define EPISO_IN_callback EP3_IN_callback
62+
63+
#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2)
64+
#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1)
65+
#define MAX_PACKET_SIZE_EPISO (MAX_PACKET_SIZE_EP3_ISO)
Lines changed: 98 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,98 @@
1+
/* mbed Microcontroller Library
2+
* Copyright (c) 2018-2018 ARM Limited
3+
*
4+
* Licensed under the Apache License, Version 2.0 (the "License");
5+
* you may not use this file except in compliance with the License.
6+
* You may obtain a copy of the License at
7+
*
8+
* http://www.apache.org/licenses/LICENSE-2.0
9+
*
10+
* Unless required by applicable law or agreed to in writing, software
11+
* distributed under the License is distributed on an "AS IS" BASIS,
12+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+
* See the License for the specific language governing permissions and
14+
* limitations under the License.
15+
*/
16+
17+
#ifndef USBPHYHW_H
18+
#define USBPHYHW_H
19+
20+
#include "mbed.h"
21+
#include "USBPhy.h"
22+
23+
#if defined(TARGET_DISCO_F746NG)
24+
#if (MBED_CONF_TARGET_USB_SPEED == 1) // Defined in json configuration file
25+
#define TARGET_DISCO_F746NG_OTG_HS
26+
#else
27+
#define TARGET_DISCO_F746NG_OTG_FS
28+
#endif
29+
#endif
30+
31+
#if defined(TARGET_DISCO_F429ZI) || \
32+
defined(TARGET_DISCO_F769NI) || \
33+
defined(TARGET_DISCO_F746NG_OTG_HS)
34+
#define USBHAL_IRQn OTG_HS_IRQn
35+
#else
36+
#define USBHAL_IRQn OTG_FS_IRQn
37+
#endif
38+
39+
#include "USBEndpoints_STM32.h"
40+
41+
#define NB_ENDPOINT 4 // Must be a multiple of 4 bytes
42+
43+
#define MAXTRANSFER_SIZE 0x200
44+
45+
#define FIFO_USB_RAM_SIZE (MAXTRANSFER_SIZE + MAX_PACKET_SIZE_EP0 + MAX_PACKET_SIZE_EP1 + MAX_PACKET_SIZE_EP2 + MAX_PACKET_SIZE_EP3)
46+
47+
#if (FIFO_USB_RAM_SIZE > 0x500)
48+
#error "FIFO dimensioning incorrect"
49+
#endif
50+
51+
class USBPhyHw : public USBPhy {
52+
public:
53+
USBPhyHw();
54+
virtual ~USBPhyHw();
55+
virtual void init(USBPhyEvents *events);
56+
virtual void deinit();
57+
virtual bool powered();
58+
virtual void connect();
59+
virtual void disconnect();
60+
virtual void configure();
61+
virtual void unconfigure();
62+
virtual void sof_enable();
63+
virtual void sof_disable();
64+
virtual void set_address(uint8_t address);
65+
virtual void remote_wakeup();
66+
virtual const usb_ep_table_t* endpoint_table();
67+
68+
virtual uint32_t ep0_set_max_packet(uint32_t max_packet);
69+
virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size);
70+
virtual void ep0_read(uint8_t *data, uint32_t size);
71+
virtual uint32_t ep0_read_result();
72+
virtual void ep0_write(uint8_t *buffer, uint32_t size);
73+
virtual void ep0_stall();
74+
75+
virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type);
76+
virtual void endpoint_remove(usb_ep_t endpoint);
77+
virtual void endpoint_stall(usb_ep_t endpoint);
78+
virtual void endpoint_unstall(usb_ep_t endpoint);
79+
80+
virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size);
81+
virtual uint32_t endpoint_read_result(usb_ep_t endpoint);
82+
virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size);
83+
virtual void endpoint_abort(usb_ep_t endpoint);
84+
85+
virtual void process();
86+
87+
USBPhyEvents *events;
88+
bool sof_enabled;
89+
90+
uint8_t epComplete[2 * NB_ENDPOINT];
91+
PCD_HandleTypeDef hpcd;
92+
93+
private:
94+
95+
static void _usbisr(void);
96+
};
97+
98+
#endif

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