Merge remote-tracking branch 'ARMmbed/master'

Author: ilg-ul

.travis.yml

@@ -5,6 +5,7 @@ script:
   - make -C events/equeue test clean
   - PYTHONPATH=. python tools/test/config_test/config_test.py
   - PYTHONPATH=. python tools/test/build_api/build_api_test.py
+  - PYTHONPATH=. python tools/test/targets/target_test.py
   - python tools/test/pylint.py
   - py.test tools/test/toolchains/api.py
   - python tools/test/memap/memap_test.py

docs/build_profiles.md

@@ -1,11 +1,11 @@
 # Build Profiles
-Mbed 5.0 supports three primary build profiles, *default*, *debug* and *small*. When using
-the online compiler the *default* profile is used. When building from the command line
+Mbed 5.0 supports three primary build profiles, *develop*, *debug* and *release*. When using
+the online compiler the *develop* profile is used. When building from the command line
 the desired profile can be can be selected by adding the ```--profile <profile>```
-command line flag. Custom user defined profiles can also be specific by giving the path
+command line flag, but `develop` will be used by default. Custom user defined profiles can also be specific by giving the path
 the the profile.
 
-## Default profile
+## Develop profile
 * Small and fast code
 * Full error information - e.g. asserts have filename and line number
 * Hard to follow code flow when using a debugger
@@ -15,7 +15,7 @@ the the profile.
 * Full error information - e.g. asserts have filename and line number
 * Largest and slowest profile
 
-## Small profile
+## Release profile
 * Smallest profile and still fast
 * Minimal error information
 * Chip is put to sleep when going idle:

features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/stm32f7_eth_init.c renamed to features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F746ZG/stm32f7_eth_init.c

@@ -0,0 +1,89 @@
+#include "stm32f7xx_hal.h"
+
+/**
+ * Override HAL Eth Init function
+ */
+void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
+{
+    GPIO_InitTypeDef GPIO_InitStructure;
+    if (heth->Instance == ETH) {
+        /* Disable DCache for STM32F7 family */
+        SCB_DisableDCache();
+
+        /* Enable GPIOs clocks */
+        __HAL_RCC_GPIOA_CLK_ENABLE();
+        __HAL_RCC_GPIOB_CLK_ENABLE();
+        __HAL_RCC_GPIOC_CLK_ENABLE();
+        __HAL_RCC_GPIOG_CLK_ENABLE();
+
+        /** ETH GPIO Configuration
+          RMII_REF_CLK ----------------------> PA1
+          RMII_MDIO -------------------------> PA2
+          RMII_MDC --------------------------> PC1
+          RMII_MII_CRS_DV -------------------> PA7
+          RMII_MII_RXD0 ---------------------> PC4
+          RMII_MII_RXD1 ---------------------> PC5
+          RMII_MII_RXER ---------------------> PG2
+          RMII_MII_TX_EN --------------------> PG11
+          RMII_MII_TXD0 ---------------------> PG13
+          RMII_MII_TXD1 ---------------------> PB13
+         */
+        /* Configure PA1, PA2 and PA7 */
+        GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
+        GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
+        GPIO_InitStructure.Pull = GPIO_NOPULL; 
+        GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
+        GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
+        HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+        /* Configure PB13 */
+        GPIO_InitStructure.Pin = GPIO_PIN_13;
+        HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
+
+        /* Configure PC1, PC4 and PC5 */
+        GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
+        HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+        /* Configure PG2, PG11 and PG13 */
+        GPIO_InitStructure.Pin =  GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13;
+        HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
+
+        /* Enable the Ethernet global Interrupt */
+        HAL_NVIC_SetPriority(ETH_IRQn, 0x7, 0);
+        HAL_NVIC_EnableIRQ(ETH_IRQn);
+        
+        /* Enable ETHERNET clock  */
+        __HAL_RCC_ETH_CLK_ENABLE();
+    }
+}
+
+/**
+ * Override HAL Eth DeInit function
+ */
+void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
+{
+    if (heth->Instance == ETH) {
+        /* Peripheral clock disable */
+        __HAL_RCC_ETH_CLK_DISABLE();
+
+        /** ETH GPIO Configuration
+          RMII_REF_CLK ----------------------> PA1
+          RMII_MDIO -------------------------> PA2
+          RMII_MDC --------------------------> PC1
+          RMII_MII_CRS_DV -------------------> PA7
+          RMII_MII_RXD0 ---------------------> PC4
+          RMII_MII_RXD1 ---------------------> PC5
+          RMII_MII_RXER ---------------------> PG2
+          RMII_MII_TX_EN --------------------> PG11
+          RMII_MII_TXD0 ---------------------> PG13
+          RMII_MII_TXD1 ---------------------> PB13
+         */
+        HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
+        HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13);
+        HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
+        HAL_GPIO_DeInit(GPIOG, GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13);
+
+        /* Disable the Ethernet global Interrupt */
+        NVIC_DisableIRQ(ETH_IRQn);
+    }
+}

features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F756ZG/stm32f7_eth_init.c

@@ -85,7 +85,7 @@ bool USBAudio::readWrite(uint8_t * buf_read, uint8_t * buf_write) {
     SOF_handler = false;
     writeIN = false;
     if (interruptIN) {
-        USBDevice::writeNB(EP3IN, buf_write, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
+        USBDevice::writeNB(EPISO_IN, buf_write, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
     } else {
         buf_stream_out = buf_write;
     }
@@ -102,7 +102,7 @@ bool USBAudio::write(uint8_t * buf) {
     writeIN = false;
     SOF_handler = false;
     if (interruptIN) {
-        USBDevice::writeNB(EP3IN, buf, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
+        USBDevice::writeNB(EPISO_IN, buf, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
     } else {
         buf_stream_out = buf;
     }
@@ -115,13 +115,13 @@ bool USBAudio::write(uint8_t * buf) {
 
 void USBAudio::writeSync(uint8_t *buf)
 {
-    USBDevice::writeNB(EP3IN, buf, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
+    USBDevice::writeNB(EPISO_IN, buf, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
 }
 
 uint32_t USBAudio::readSync(uint8_t *buf)
 {
     uint32_t size = 0;
-    USBDevice::readEP(EP3OUT, (uint8_t *)buf, &size, PACKET_SIZE_ISO_IN);
+    USBDevice::readEP(EPISO_OUT, (uint8_t *)buf, &size, PACKET_SIZE_ISO_IN);
     return size;
 }
 
@@ -134,15 +134,15 @@ bool USBAudio::EPISO_OUT_callback() {
     uint32_t size = 0;
     interruptOUT = true;
     if (buf_stream_in != NULL) {
-        readEP(EP3OUT, (uint8_t *)buf_stream_in, &size, PACKET_SIZE_ISO_IN);
+        readEP(EPISO_OUT, (uint8_t *)buf_stream_in, &size, PACKET_SIZE_ISO_IN);
         available = true;
         buf_stream_in = NULL;
     }
     else  {
         if (rxDone)
             rxDone.call();
     }
-    readStart(EP3OUT, PACKET_SIZE_ISO_IN);
+    readStart(EPISO_OUT, PACKET_SIZE_ISO_IN);
     return false;
 }
 
@@ -164,10 +164,10 @@ void USBAudio::SOF(int frameNumber) {
     if (!interruptOUT) {
         // read the isochronous endpoint
         if (buf_stream_in != NULL) {
-            if (USBDevice::readEP_NB(EP3OUT, (uint8_t *)buf_stream_in, &size, PACKET_SIZE_ISO_IN)) {
+            if (USBDevice::readEP_NB(EPISO_OUT, (uint8_t *)buf_stream_in, &size, PACKET_SIZE_ISO_IN)) {
                 if (size) {
                     available = true;
-                    readStart(EP3OUT, PACKET_SIZE_ISO_IN);
+                    readStart(EPISO_OUT, PACKET_SIZE_ISO_IN);
                     buf_stream_in = NULL;
                 }
             }
@@ -177,7 +177,7 @@ void USBAudio::SOF(int frameNumber) {
     if (!interruptIN) {
         // write if needed
         if (buf_stream_out != NULL) {
-            USBDevice::writeNB(EP3IN, (uint8_t *)buf_stream_out, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
+            USBDevice::writeNB(EPISO_IN, (uint8_t *)buf_stream_out, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
             buf_stream_out = NULL;
         }
     }
@@ -194,11 +194,11 @@ bool USBAudio::USBCallback_setConfiguration(uint8_t configuration) {
     }
 
     // Configure isochronous endpoint
-    realiseEndpoint(EP3OUT, PACKET_SIZE_ISO_IN, ISOCHRONOUS);
-    realiseEndpoint(EP3IN, PACKET_SIZE_ISO_OUT, ISOCHRONOUS);
+    realiseEndpoint(EPISO_OUT, PACKET_SIZE_ISO_IN, ISOCHRONOUS);
+    realiseEndpoint(EPISO_IN, PACKET_SIZE_ISO_OUT, ISOCHRONOUS);
 
     // activate readings on this endpoint
-    readStart(EP3OUT, PACKET_SIZE_ISO_IN);
+    readStart(EPISO_OUT, PACKET_SIZE_ISO_IN);
     return true;
 }
 

features/unsupported/USBDevice/USBAudio/USBAudio.cpp

@@ -15,9 +15,16 @@
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
-#if (defined (USB_STM_HAL) && defined(TARGET_STM32F4)) \
-|| defined(TARGET_STM32F2) || defined (TARGET_STM32F7) || defined (TARGET_STM32F3) || defined (TARGET_STM32L4)
+/* TARGET NOT STM does not support this HAL */
+#ifndef TARGET_STM
+#define USBSTM_HAL_UNSUPPORTED
+#endif
+/* F4 famlily wihtout USB_STM_HAL use another HAL*/
+#if defined(TARGET_STM) && defined(TARGET_STM32F4) && !defined(USB_STM_HAL)
+#define USBSTM_HAL_UNSUPPORTED
+#endif
 
+#ifndef USBSTM_HAL_UNSUPPORTED
 #include "USBHAL.h"
 #include "pinmap.h"
 /* mbed endpoint definition to hal definition   */

features/unsupported/USBDevice/USBDevice/TARGET_STM/USBHAL_STM32.cpp

@@ -45,7 +45,7 @@ typedef enum {
 #include "USBEndpoints_KL25Z.h"
 #elif !defined(USB_STM_HAL) && defined(TARGET_STM32F4)
 #include "USBEndpoints_STM32F4.h"
-#elif defined (TARGET_STM32F4) || defined (TARGET_STM32F2) || defined (TARGET_STM32F7) || defined (TARGET_STM32F3) || defined(TARGET_STM32L4)
+#elif defined (TARGET_STM32F4) || defined (TARGET_STM32F2) || defined (TARGET_STM32F7) || defined (TARGET_STM32F3) || defined(TARGET_STM32L4) || defined(TARGET_STM32F1)
 #include "USBEndpoints_STM32.h"
 #elif defined (TARGET_RZ_A1H) || defined (TARGET_VK_RZ_A1H)
 #include "USBEndpoints_RZ_A1H.h"

features/unsupported/USBDevice/USBDevice/USBEndpoints.h

@@ -130,7 +130,7 @@ class USBHAL {
     bool (USBHAL::*epCallback[10 - 2])(void);
 #elif (defined(TARGET_STM32F4) && !defined(USB_STM_HAL)) || defined(TARGET_NUMAKER_PFM_M453)
     bool (USBHAL::*epCallback[8 - 2])(void);
-#elif defined(TARGET_STM32F4) || defined(TARGET_STM32F3) || defined (TARGET_STM32F2)|| defined(TARGET_STM32L4) || defined(TARGET_STM32F7)
+#elif defined(TARGET_STM)
     PCD_HandleTypeDef hpcd;
 #elif defined(TARGET_NUMAKER_PFM_NUC472)
     bool (USBHAL::*epCallback[14 - 2])(void);

features/unsupported/USBDevice/USBDevice/USBHAL.h

@@ -53,9 +53,15 @@ ENTRY(Reset_Handler)
 
 __ram_vector_table__ = 1;
 
-/* Heap 1/4 of ram and stack 1/8 */
-__stack_size__ = 0x8000;
-__heap_size__ = 0x10000;
+/* With the RTOS in use, this does not affect the main stack size. The size of
+ * the stack where main runs is determined via the RTOS. */
+__stack_size__ = 0x400;
+
+/* This is the guaranteed minimum available heap size for an application. When
+ * uVisor is enabled, this is also the maximum available heap size. The
+ * HEAP_SIZE value is set by uVisor porters to balance the size of the legacy
+ * heap and the page heap in uVisor applications. */
+__heap_size__ = 0x6000;
 
 HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
 STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;

targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_GCC_ARM/MK64FN1M0xxx12.ld

@@ -30,9 +30,6 @@
 //*****************************************************************************
 
 #if defined (__cplusplus)
-#ifdef __REDLIB__
-#error Redlib does not support C++
-#else
 //*****************************************************************************
 //
 // The entry point for the C++ library startup
@@ -42,7 +39,6 @@ extern "C" {
     extern void __libc_init_array(void);
 }
 #endif
-#endif
 
 #define WEAK __attribute__ ((weak))
 #define ALIAS(f) __attribute__ ((weak, alias (#f)))
@@ -53,10 +49,8 @@ extern "C" {
 #endif
 
 //*****************************************************************************
-#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
 // Declaration of external SystemInit function
 extern void SystemInit(void);
-#endif
 
 // Patch the AEABI integer divide functions to use MCU's romdivide library
 #ifdef __USE_ROMDIVIDE
@@ -122,15 +116,10 @@ void PIN_INT7_IRQHandler(void) ALIAS(IntDefaultHandler);
 //*****************************************************************************
 //
 // The entry point for the application.
-// __main() is the entry point for Redlib based applications
 // main() is the entry point for Newlib based applications
 //
 //*****************************************************************************
-#if defined (__REDLIB__)
-extern void __main(void);
-#else
 extern int main(void);
-#endif
 //*****************************************************************************
 //
 // External declaration for the pointer to the stack top from the Linker Script
@@ -283,9 +272,7 @@ ResetISR(void) {
     pDivRom_uidiv = (unsigned int *)div_ptr[1];
 #endif
 
-#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
     SystemInit();
-#endif
 
 #if defined (__cplusplus)
     //
@@ -294,12 +281,7 @@ ResetISR(void) {
     __libc_init_array();
 #endif
 
-#if defined (__REDLIB__)
-    // Call the Redlib library, which in turn calls main()
-    __main() ;
-#else
     main();
-#endif
 
     //
     // main() shouldn't return, but if it does, we'll just enter an infinite loop

targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_GCC_CR/startup_LPC824_CR.cpp

@@ -57,14 +57,16 @@ void spi_free(spi_t *obj)
 void spi_format(spi_t *obj, int bits, int mode, int slave)
 {
     /* Clear word width | Slave/Master | CPOL | CPHA | MSB first bits in control register */
-    obj->membase->CONTROL.WORD &= ~(uint32_t)((True >> SPI_WORD_WIDTH_BIT_POS) |
-                                  (True >> SPI_SLAVE_MASTER_BIT_POS) |
-                                  (True >> SPI_CPOL_BIT_POS) |
-                                  (True >> SPI_CPHA_BIT_POS));
+    obj->membase->CONTROL.WORD &= ~(uint32_t)((True << SPI_WORD_WIDTH_BIT_POS) |
+                                    (True << SPI_SLAVE_MASTER_BIT_POS) |
+                                    (True << SPI_CPOL_BIT_POS) |
+                                    (True << SPI_CPHA_BIT_POS));
 
     /* Configure word width | Slave/Master | CPOL | CPHA | MSB first bits in control register */
-    obj->membase->CONTROL.WORD |= (uint32_t)(((bits >> 0x4) >> 6) | (!slave >> 5) |
-                                  ((mode >> 0x1) >> 4) | ((mode & 0x1) >> 3));
+    obj->membase->CONTROL.WORD |= (uint32_t)(((bits >> 0x4) << SPI_WORD_WIDTH_BIT_POS) |
+                                              (!slave << SPI_SLAVE_MASTER_BIT_POS) |
+                                              ((mode >> 0x1) << SPI_CPOL_BIT_POS) |
+                                              ((mode & 0x1) << SPI_CPHA_BIT_POS));
 }
 
 void spi_frequency(spi_t *obj, int hz)