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Merge pull request #14542 from JeanMarcR/STM32F3_NEW_CUBE
STM32F3 update drivers version to CUBE V1.11.2
2 parents a32a45c + a1055f5 commit 49b018c

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‎targets/TARGET_STM/README.md

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@@ -64,7 +64,7 @@ This table summarizes the STM32Cube versions currently used in Mbed OS master br
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| F0 | 1.11.2 | https://github.com/STMicroelectronics/STM32CubeF0 |
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| F1 | 1.8.3 | https://github.com/STMicroelectronics/STM32CubeF1 |
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| F2 | 1.6.0 | https://github.com/STMicroelectronics/STM32CubeF2 |
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| F3 | 1.9.0 | https://github.com/STMicroelectronics/STM32CubeF3 |
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| F3 | 1.11.2 | https://github.com/STMicroelectronics/STM32CubeF3 |
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| F4 | 1.26.0 | https://github.com/STMicroelectronics/STM32CubeF4 |
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| F7 | 1.16.0 | https://github.com/STMicroelectronics/STM32CubeF7 |
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| G0 | 1.4.1 | https://github.com/STMicroelectronics/STM32CubeG0 |

‎targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f301x8.h

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@@ -50,9 +50,8 @@
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#define __NVIC_PRIO_BITS 4U /*!< STM32F301x8 devices use 4 Bits for the Priority Levels */
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#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
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#ifndef __FPU_PRESENT
53-
#define __FPU_PRESENT 1U /*!< STM32F301x8 devices provide an FPU */
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#define __FPU_PRESENT 1U /*!< STM32F301x8 devices provide an FPU */
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#endif
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/**
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* @}
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*/

‎targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f302x8.h

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@@ -781,7 +781,7 @@ typedef struct
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#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
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#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
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#define I2C3 ((I2C_TypeDef *) I2C3_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define PWR ((PWR_TypeDef *) PWR_BASE)
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#define DAC ((DAC_TypeDef *) DAC_BASE)
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#define DAC1 ((DAC_TypeDef *) DAC1_BASE)

‎targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f302xc.h

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@@ -49,10 +49,9 @@
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#define __MPU_PRESENT 1U /*!< STM32F302xC devices provide an MPU */
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#define __NVIC_PRIO_BITS 4U /*!< STM32F302xC devices use 4 Bits for the Priority Levels */
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#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
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#ifndef __FPU_PRESENT
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ifndef __FPU_PRESENT
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#define __FPU_PRESENT 1U /*!< STM32F302xC devices provide an FPU */
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#endif
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/**
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* @}
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*/
@@ -803,7 +802,7 @@ typedef struct
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#define UART5 ((USART_TypeDef *) UART5_BASE)
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#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
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#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define PWR ((PWR_TypeDef *) PWR_BASE)
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#define DAC ((DAC_TypeDef *) DAC_BASE)
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#define DAC1 ((DAC_TypeDef *) DAC1_BASE)

‎targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f302xe.h

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@@ -52,7 +52,6 @@
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#ifndef __FPU_PRESENT
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#define __FPU_PRESENT 1U /*!< STM32F302xE devices provide an FPU */
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#endif
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/**
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* @}
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*/

‎targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f303x8.h

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@@ -729,7 +729,7 @@ typedef struct
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#define USART2 ((USART_TypeDef *) USART2_BASE)
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#define USART3 ((USART_TypeDef *) USART3_BASE)
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#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define PWR ((PWR_TypeDef *) PWR_BASE)
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#define DAC ((DAC_TypeDef *) DAC_BASE)
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#define DAC1 ((DAC_TypeDef *) DAC1_BASE)

‎targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f303xc.h

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@@ -52,7 +52,6 @@
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#ifndef __FPU_PRESENT
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#define __FPU_PRESENT 1U /*!< STM32F303xC devices provide an FPU */
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#endif
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/**
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* @}
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*/
@@ -823,7 +822,7 @@ typedef struct
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#define UART5 ((USART_TypeDef *) UART5_BASE)
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#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
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#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define PWR ((PWR_TypeDef *) PWR_BASE)
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#define DAC ((DAC_TypeDef *) DAC_BASE)
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#define DAC1 ((DAC_TypeDef *) DAC1_BASE)

‎targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f303xe.h

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@@ -925,7 +925,7 @@ typedef struct
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#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
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#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
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#define I2C3 ((I2C_TypeDef *) I2C3_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define PWR ((PWR_TypeDef *) PWR_BASE)
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#define DAC ((DAC_TypeDef *) DAC_BASE)
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#define DAC1 ((DAC_TypeDef *) DAC1_BASE)

‎targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f318xx.h

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#ifndef __FPU_PRESENT
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#define __FPU_PRESENT 1U /*!< STM32F318xx devices provide an FPU */
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#endif
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/**
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* @}
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*/

‎targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f328xx.h

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@@ -52,7 +52,6 @@
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#ifndef __FPU_PRESENT
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#define __FPU_PRESENT 1U /*!< STM32F328xx devices provide an FPU */
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#endif
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/**
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* @}
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*/
@@ -729,7 +728,7 @@ typedef struct
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#define USART2 ((USART_TypeDef *) USART2_BASE)
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#define USART3 ((USART_TypeDef *) USART3_BASE)
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#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define PWR ((PWR_TypeDef *) PWR_BASE)
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#define DAC ((DAC_TypeDef *) DAC_BASE)
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#define DAC1 ((DAC_TypeDef *) DAC1_BASE)

‎targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f334x8.h

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@@ -52,7 +52,6 @@
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#ifndef __FPU_PRESENT
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#define __FPU_PRESENT 1U /*!< STM32F334x8 devices provide an FPU */
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#endif
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/**
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* @}
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*/

‎targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f358xx.h

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@@ -52,7 +52,6 @@
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#ifndef __FPU_PRESENT
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#define __FPU_PRESENT 1U /*!< STM32F358xx devices provide an FPU */
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#endif
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/**
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* @}
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*/

‎targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f373xc.h

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@@ -52,7 +52,6 @@
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#ifndef __FPU_PRESENT
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#define __FPU_PRESENT 1U /*!< STM32F373xC devices provide an FPU */
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#endif
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/**
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* @}
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*/
@@ -833,7 +832,7 @@ typedef struct
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#define USART3 ((USART_TypeDef *) USART3_BASE)
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#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
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#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
835+
#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define PWR ((PWR_TypeDef *) PWR_BASE)
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#define DAC ((DAC_TypeDef *) DAC_BASE)
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#define DAC1 ((DAC_TypeDef *) DAC1_BASE)

‎targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f378xx.h

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#ifndef __FPU_PRESENT
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#define __FPU_PRESENT 1U /*!< STM32F378xx devices provide an FPU */
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#endif
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/**
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* @}
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*/
@@ -793,7 +792,7 @@ typedef struct
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#define USART3 ((USART_TypeDef *) USART3_BASE)
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#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
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#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define PWR ((PWR_TypeDef *) PWR_BASE)
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#define DAC ((DAC_TypeDef *) DAC_BASE)
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#define DAC1 ((DAC_TypeDef *) DAC1_BASE)

‎targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f398xx.h

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@@ -52,7 +52,6 @@
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#ifndef __FPU_PRESENT
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#define __FPU_PRESENT 1U /*!< STM32F398xx devices provide an FPU */
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#endif
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/**
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* @}
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*/
@@ -883,7 +882,7 @@ typedef struct
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#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
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#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
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#define I2C3 ((I2C_TypeDef *) I2C3_BASE)
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#define CAN1 ((CAN_TypeDef *) CAN_BASE)
885+
#define CAN1 ((CAN_TypeDef *) CAN_BASE)
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#define PWR ((PWR_TypeDef *) PWR_BASE)
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#define DAC ((DAC_TypeDef *) DAC_BASE)
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#define DAC1 ((DAC_TypeDef *) DAC1_BASE)

‎targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f3xx.h

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#endif /* USE_HAL_DRIVER */
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/**
106-
* @brief CMSIS Device version number V2.3.4
106+
* @brief CMSIS Device version number V2.3.5
107107
*/
108108
#define __STM32F3_CMSIS_VERSION_MAIN (0x02) /*!< [31:24] main version */
109109
#define __STM32F3_CMSIS_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
110-
#define __STM32F3_CMSIS_VERSION_SUB2 (0x04) /*!< [15:8] sub2 version */
110+
#define __STM32F3_CMSIS_VERSION_SUB2 (0x05) /*!< [15:8] sub2 version */
111111
#define __STM32F3_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
112112
#define __STM32F3_CMSIS_VERSION ((__STM32F3_CMSIS_VERSION_MAIN << 24)\
113113
|(__STM32F3_CMSIS_VERSION_SUB1 << 16)\

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