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Merge pull request #5821 from bcostm/add_BL_nucleo-f746zg
STM32F7: Add bootloader support
2 parents 892e5e1 + 4d0535a commit 4c07c1c

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12 files changed

+94
-23
lines changed

12 files changed

+94
-23
lines changed

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/system_clock.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@
3030
**/
3131

3232
#include "stm32f7xx.h"
33+
#include "nvic_addr.h"
3334
#include "mbed_assert.h"
3435

3536
/*!< Uncomment the following line if you need to relocate your vector Table in
@@ -92,7 +93,7 @@ void SystemInit(void)
9293
#ifdef VECT_TAB_SRAM
9394
SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
9495
#else
95-
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
96+
SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
9697
#endif
9798

9899
}

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_MICRO/stm32f746xg.sct

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
#! armcc -E
12
; Scatter-Loading Description File
23
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
34
; Copyright (c) 2016, STMicroelectronics
@@ -27,10 +28,18 @@
2728
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2829
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2930

31+
#if !defined(MBED_APP_START)
32+
#define MBED_APP_START 0x08000000
33+
#endif
34+
35+
#if !defined(MBED_APP_SIZE)
36+
#define MBED_APP_SIZE 0x100000
37+
#endif
38+
3039
; STM32F746NG: 1024 KB FLASH (0x100000) + 320 KB SRAM (0x50000)
31-
LR_IROM1 0x08000000 0x100000 { ; load region size_region
40+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
3241

33-
ER_IROM1 0x08000000 0x100000 { ; load address = execution address
42+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
3443
*.o (RESET, +First)
3544
*(InRoot$$Sections)
3645
.ANY (+RO)

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_STD/stm32f746xg.sct

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
#! armcc -E
12
; Scatter-Loading Description File
23
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
34
; Copyright (c) 2016, STMicroelectronics
@@ -27,10 +28,18 @@
2728
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2829
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2930

31+
#if !defined(MBED_APP_START)
32+
#define MBED_APP_START 0x08000000
33+
#endif
34+
35+
#if !defined(MBED_APP_SIZE)
36+
#define MBED_APP_SIZE 0x100000
37+
#endif
38+
3039
; STM32F746NG: 1024 KB FLASH (0x100000) + 320 KB SRAM (0x50000)
31-
LR_IROM1 0x08000000 0x100000 { ; load region size_region
40+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
3241

33-
ER_IROM1 0x08000000 0x100000 { ; load address = execution address
42+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
3443
*.o (RESET, +First)
3544
*(InRoot$$Sections)
3645
.ANY (+RO)

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_GCC_ARM/STM32F746xG.ld

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,16 @@
11
/* Linker script to configure memory regions. */
2+
3+
#if !defined(MBED_APP_START)
4+
#define MBED_APP_START 0x08000000
5+
#endif
6+
7+
#if !defined(MBED_APP_SIZE)
8+
#define MBED_APP_SIZE 1024K
9+
#endif
10+
211
MEMORY
312
{
4-
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
13+
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
514
RAM (rwx) : ORIGIN = 0x200001C8, LENGTH = 320K - 0x1C8
615
}
716

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_IAR/stm32f746xg.icf

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,10 @@
1+
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
2+
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
3+
14
/* [ROM = 1024kb = 0x100000] */
2-
define symbol __intvec_start__ = 0x08000000;
3-
define symbol __region_ROM_start__ = 0x08000000;
4-
define symbol __region_ROM_end__ = 0x080FFFFF;
5+
define symbol __intvec_start__ = MBED_APP_START;
6+
define symbol __region_ROM_start__ = MBED_APP_START;
7+
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
58

69
/* [RAM = 320kb = 0x50000] Vector table dynamic copy: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM */
710
define symbol __NVIC_start__ = 0x20000000;

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/system_clock.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@
3030
**/
3131

3232
#include "stm32f7xx.h"
33+
#include "nvic_addr.h"
3334
#include "mbed_assert.h"
3435

3536
/*!< Uncomment the following line if you need to relocate your vector Table in
@@ -92,7 +93,7 @@ void SystemInit(void)
9293
#ifdef VECT_TAB_SRAM
9394
SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
9495
#else
95-
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
96+
SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
9697
#endif
9798

9899
}

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_MICRO/stm32f767xi.sct

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
#! armcc -E
12
; Scatter-Loading Description File
23
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
34
; Copyright (c) 2016, STMicroelectronics
@@ -27,10 +28,18 @@
2728
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2829
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2930

31+
#if !defined(MBED_APP_START)
32+
#define MBED_APP_START 0x08000000
33+
#endif
34+
35+
#if !defined(MBED_APP_SIZE)
36+
#define MBED_APP_SIZE 0x200000
37+
#endif
38+
3039
; STM32F767ZI: 2048 KB FLASH (0x200000) + 512 KB SRAM (0x80000)
31-
LR_IROM1 0x08000000 0x200000 { ; load region size_region
40+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
3241

33-
ER_IROM1 0x08000000 0x200000 { ; load address = execution address
42+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
3443
*.o (RESET, +First)
3544
*(InRoot$$Sections)
3645
.ANY (+RO)

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_STD/stm32f767xi.sct

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
#! armcc -E
12
; Scatter-Loading Description File
23
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
34
; Copyright (c) 2016, STMicroelectronics
@@ -27,10 +28,18 @@
2728
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2829
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2930

31+
#if !defined(MBED_APP_START)
32+
#define MBED_APP_START 0x08000000
33+
#endif
34+
35+
#if !defined(MBED_APP_SIZE)
36+
#define MBED_APP_SIZE 0x200000
37+
#endif
38+
3039
; STM32F767ZI: 2048 KB FLASH (0x200000) + 512 KB SRAM (0x80000)
31-
LR_IROM1 0x08000000 0x200000 { ; load region size_region
40+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
3241

33-
ER_IROM1 0x08000000 0x200000 { ; load address = execution address
42+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
3443
*.o (RESET, +First)
3544
*(InRoot$$Sections)
3645
.ANY (+RO)

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_GCC_ARM/STM32F767xI.ld

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,16 @@
11
/* Linker script to configure memory regions. */
2+
3+
#if !defined(MBED_APP_START)
4+
#define MBED_APP_START 0x08000000
5+
#endif
6+
7+
#if !defined(MBED_APP_SIZE)
8+
#define MBED_APP_SIZE 2048K
9+
#endif
10+
211
MEMORY
312
{
4-
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
13+
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
514
RAM (rwx) : ORIGIN = 0x200001F8, LENGTH = 512K - 0x1F8
615
}
716

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_IAR/stm32f767xi.icf

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,10 @@
1+
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
2+
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x200000; }
3+
14
/* [ROM = 2048kb = 0x200000] */
2-
define symbol __intvec_start__ = 0x08000000;
3-
define symbol __region_ROM_start__ = 0x08000000;
4-
define symbol __region_ROM_end__ = 0x081FFFFF;
5+
define symbol __intvec_start__ = MBED_APP_START;
6+
define symbol __region_ROM_start__ = MBED_APP_START;
7+
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
58

69
/* [RAM = 512kb = 0x80000] Vector table dynamic copy: 126 vectors = 504 bytes (0x1F8) to be reserved in RAM */
710
define symbol __NVIC_start__ = 0x20000000;

‎targets/TARGET_STM/mbed_overrides.c

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -35,9 +35,16 @@ void mbed_sdk_init()
3535
HAL_Init();
3636

3737
#if TARGET_STM32F7
38-
// Enable CPU L1-Cache
39-
SCB_EnableICache();
40-
SCB_EnableDCache();
38+
// The mbed_sdk_init can be called either during cold boot or during
39+
// application boot after bootloader has been executed.
40+
// In case the bootloader has already enabled the cache,
41+
// is is needed to not enable it again.
42+
if (SCB->CCR & (uint32_t)SCB_CCR_IC_Msk == 0) { // If ICache is disabled
43+
SCB_EnableICache();
44+
}
45+
if (SCB->CCR & (uint32_t)SCB_CCR_DC_Msk == 0) { // If DCache is disabled
46+
SCB_EnableDCache();
47+
}
4148
#endif /* TARGET_STM32F7 */
4249

4350
/* Configure the System clock source, PLL Multiplier and Divider factors,

‎targets/targets.json

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1294,7 +1294,8 @@
12941294
"device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
12951295
"features": ["LWIP"],
12961296
"release_versions": ["2", "5"],
1297-
"device_name": "STM32F746ZG"
1297+
"device_name": "STM32F746ZG",
1298+
"bootloader_supported": true
12981299
},
12991300
"NUCLEO_F756ZG": {
13001301
"inherits": ["FAMILY_STM32"],
@@ -1350,7 +1351,8 @@
13501351
"device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
13511352
"features": ["LWIP"],
13521353
"release_versions": ["2", "5"],
1353-
"device_name": "STM32F767ZI"
1354+
"device_name": "STM32F767ZI",
1355+
"bootloader_supported": true
13541356
},
13551357
"NUCLEO_L011K4": {
13561358
"inherits": ["FAMILY_STM32"],

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