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Add support for QSPI on DISCO_L476VG
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+35
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4 files changed

+35
-1
lines changed

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PeripheralNames.h

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@@ -83,6 +83,10 @@ typedef enum {
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CAN_1 = (int)CAN1_BASE
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} CANName;
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typedef enum {
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QSPI_1 = (int)QSPI_R_BASE,
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} QSPIName;
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#ifdef __cplusplus
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}
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#endif

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PeripheralPins.c

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@@ -286,3 +286,29 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = {
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{PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
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{NC, NC, 0}
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};
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//*** QUADSPI ***
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MBED_WEAK const PinMap PinMap_QSPI_DATA[] = {
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{PA_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO3 not connected
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{PA_7, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO2 not connected
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{PB_0, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO1 not connected
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{PB_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO0 not connected
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{PE_12, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO0 connected to N25Q128
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{PE_13, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO1 connected to N25Q128
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{PE_14, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO2 connected to N25Q128
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{PE_15, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // IO3 connected to N25Q128
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{NC, NC, 0}
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};
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MBED_WEAK const PinMap PinMap_QSPI_SCLK[] = {
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// {PB_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
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{PE_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // connected to N25Q128
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{NC, NC, 0}
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};
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MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
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// {PB_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
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{PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // connected to N25Q128
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{NC, NC, 0}
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};

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/objects.h

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@@ -58,6 +58,10 @@ struct trng_s {
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RNG_HandleTypeDef handle;
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};
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struct qspi_s {
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QSPI_HandleTypeDef handle;
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};
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#include "common_objects.h"
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#ifdef __cplusplus

targets/targets.json

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@@ -1914,7 +1914,7 @@
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},
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"detect_code": ["0820"],
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"macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"],
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"device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
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"device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH", "QSPI"],
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"release_versions": ["2", "5"],
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"device_name": "STM32L476VG",
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"bootloader_supported": true

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