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theotherjimmytheotherjimmy
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Merge pull request #5125 from theotherjimmy/improve-memap-performance
Refactor memap for speed
2 parents 8acfcfb + 727256a commit 4de4481

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9 files changed

+351
-242
lines changed

‎tools/memap.py

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‎tools/profiles/debug.json

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"asm": [],
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"c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
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"cxx": ["--cpp", "--no_rtti", "--no_vla"],
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"ld": []
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"ld": ["--show_full_path"]
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},
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"uARM": {
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"common": ["-c", "--gnu", "-Otime", "--split_sections",

‎tools/profiles/develop.json

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"asm": [],
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"c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
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"cxx": ["--cpp", "--no_rtti", "--no_vla"],
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"ld": []
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"ld": ["--show_full_path"]
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},
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"uARM": {
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"common": ["-c", "--gnu", "-Otime", "--split_sections",

‎tools/profiles/release.json

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"asm": [],
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"c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
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"cxx": ["--cpp", "--no_rtti", "--no_vla"],
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"ld": []
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"ld": ["--show_full_path"]
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},
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"uARM": {
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"common": ["-c", "--gnu", "-Ospace", "--split_sections",

‎tools/test/memap/arm.map

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Component: ARM Compiler 5.06 update 5 (build 528) Tool: armlink [4d35e2]
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==============================================================================
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Memory Map of the image
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Image Entry point : 0x0001b0c1
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Load Region LR_IROM1 (Base: 0x0001b000, Size: 0x0000ed04, Max: 0x00025000, ABSOLUTE, COMPRESSED[0x0000e23c])
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Execution Region ER_IROM1 (Base: 0x0001b000, Size: 0x0000e1c4, Max: 0x00025000, ABSOLUTE)
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Base Addr Size Type Attr Idx E Section Name Object
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0x0001b000 0x000000c0 Data RO 7002 RESET /common/path/startup/startup.o
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0x0001b0c0 0x00000008 Code RO 8820 * !!!main /installed/libs/../lib/armlib/c_p.l(__main.o)
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0x0001b26c 0x00000098 Code RO 6076 .text /common/path/irqs/irqs.o
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0x000206a0 0x00000036 Code RO 27 i._Z9time_funcPN4mbed5TimerEi /common/path/main.o
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0x200039b4 0x00000018 Data RW 8092 .data /common/path/data/data.o
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0x20003af8 0x00000198 Zero RW 57 .bss /common/path/data/data.o
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==============================================================================
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Image component sizes
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Code (inc. data) RO Data RW Data ZI Data Debug
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344 368 0 24 408 36188 Object Totals
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8 0 0 0 0 7596 Library Totals
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==============================================================================
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Code (inc. data) RO Data RW Data ZI Data Debug
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352 376 0 24 408 17208 Grand Totals
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352 376 0 24 408 17208 ELF Image Totals (compressed)
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352 376 0 24 0 0 ROM Totals
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==============================================================================
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Total RO Size (Code + RO Data) 352 ( 0.35kB)
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Total RW Size (RW Data + ZI Data) 432 ( 0.43kB)
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Total ROM Size (Code + RO Data + RW Data) 376 ( 0.37kB)
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==============================================================================

‎tools/test/memap/gcc.map

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Archive member included to satisfy reference by file (symbol)
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Linker script and memory map
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.text 0x000000000001b000 0x11a30
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.Vectors 0x000000000001b000 0x98 /common/path/irqs/irqs.o
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0x000000000001b168 0x36 /common/path/main.o
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0x000000000001b168 count5(unsigned int, unsigned int, unsigned int, unsigned int, unsigned int)
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0x000000000001b200 0xc0 /common/path/startup/startup.o
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0x000000000001b200 startup()
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0x0000000000024020 0x8 /usr/lib/gcc/arm-none-eabi/7.1.0/../../../../arm-none-eabi/lib/armv6-m/libd16M_tlf.a(__main.o)
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.data 0x0000000020002ef8 0xac8 load address 0x000000000002ca38
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0x0000000020002ef8 __data_start__ = .
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*(vtable)
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*(.data*)
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0x0000000020002ef8 0x18 /common/path/data/data.o
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0x0000000020002ef8 some_global_var
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.bss 0x0000000020003a80 0x2050 load address 0x000000000002d5c0
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0x0000000020003a80 . = ALIGN (0x4)
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0x0000000020003a80 __bss_start__ = .
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*(.bss*)
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.bss.completed.8574
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.bss.counter 0x0000000020003c08 0x198 /common/path/data.o
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0x0000000020003c08 some_zero_init_var

‎tools/test/memap/iar.map

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###############################################################################
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#
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# IAR ELF Linker V7.80.1.28/LNX for ARM 18/Sep/2017 14:26:09
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# Copyright 2007-2016 IAR Systems AB.
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#
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# Output file =
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# /common/path/project.elf
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# Map file =
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# /common/path/project.map
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# Command line =
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# -f
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# /common/path/.link_files.txt
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# (-o
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# --map=/common/path/project.map
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# /common/path/project.elf
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# /common/path/main.o
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# /common/path/startup/startup.o
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# /common/path/irqs/irqs.o
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# /common/path/data/data.o
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#
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###############################################################################
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*******************************************************************************
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*** RUNTIME MODEL ATTRIBUTES
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***
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CppFlavor = *
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__CPP_Exceptions = Disabled
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__CPP_Language = C++
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__Heap_Handler = DLMalloc
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__SystemLibrary = DLib
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__dlib_dynamic_initialization = postponed
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__dlib_has_iterator_debugging = 0
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__dlib_jmp_buf_num_elements = 8
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*******************************************************************************
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*** PLACEMENT SUMMARY
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***
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"A0": place at 0x0001b000 { ro section .intvec };
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"P1": place in [from 0x0001b0c0 to 0x0003ffff] { ro };
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"P2": place in [from 0x20002ef8 to 0x20007fff] { rw, block HEAP, block CSTACK };
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do not initialize { section .noinit };
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initialize by copy { rw };
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{ section .intvec };
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Section Kind Address Size Object
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------- ---- ------- ---- ------
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"A0": 0xc0
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.intvec ro code 0x0001b000 0xc0 startup.o [4]
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- 0x0001b0c0 0xc0
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"P1": 0x
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.text ro code 0x0001c753 0x36 main.o [3]
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.text ro code 0x0001cfff 0x98 irqs.o [5]
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.text ro code 0x0001c778 0x8 __main.o [67]
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"P2", part 1 of 2: 0x18
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P2-1 0x20002ef8 0x18 <Init block>
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.data inited 0x20002fa8 0x18 data.o [6]
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"P2", part 2 of 2: 0x198
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P2-2 0x20005388 0x198 <Init block>
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.bss zero 0x20002fa8 0x198 data.o [6]
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*******************************************************************************
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*** INIT TABLE
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***
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*******************************************************************************
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*** MODULE SUMMARY
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***
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d16M_tlf.a: [67]
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__main.o 8
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------------------------------------------------
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Total: 8
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Linker created
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---------------------------------------------------
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Grand Total:
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*******************************************************************************
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*** ENTRY LIST
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***

‎tools/test/memap/parse_test.py

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import sys
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from io import open
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from os.path import isfile, join, dirname
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import json
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import pytest
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from tools.memap import MemapParser
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from copy import deepcopy
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PARSED_ARM_DATA = {
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"startup/startup.o": {".text": 0xc0},
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"[lib]/c_p.l/__main.o": {".text": 8},
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"irqs/irqs.o": {".text": 0x98},
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"data/data.o": {".data": 0x18, ".bss": 0x198},
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"main.o": {".text": 0x36},
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}
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def test_parse_armcc():
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memap = MemapParser()
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memap.parse_map_file_armcc(open(join(dirname(__file__), "arm.map")))
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assert memap.modules == PARSED_ARM_DATA
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PARSED_IAR_GCC_DATA = {
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"startup/startup.o": {".text": 0xc0},
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"[lib]/d16M_tlf.a/__main.o": {".text": 8},
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"irqs/irqs.o": {".text": 0x98},
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"data/data.o": {".data": 0x18, ".bss": 0x198},
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"main.o": {".text": 0x36},
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}
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def test_parse_iar():
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memap = MemapParser()
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memap.parse_map_file_iar(open(join(dirname(__file__), "iar.map")))
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assert memap.modules == PARSED_IAR_GCC_DATA
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def test_parse_gcc():
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memap = MemapParser()
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memap.parse_map_file_gcc(open(join(dirname(__file__), "gcc.map")))
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assert memap.modules == PARSED_IAR_GCC_DATA
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def test_add_empty_module():
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memap = MemapParser()
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old_modules = deepcopy(memap.modules)
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memap.module_add("", 8, ".data")
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assert(old_modules == memap.modules)
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memap.module_add("main.o", 0, ".text")
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assert(old_modules == memap.modules)
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memap.module_add("main.o", 8, "")
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assert(old_modules == memap.modules)
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def test_add_full_module():
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memap = MemapParser()
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old_modules = deepcopy(memap.modules)
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memap.module_add("main.o", 8, ".data")
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assert(old_modules != memap.modules)
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assert("main.o" in memap.modules)
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assert(".data" in memap.modules["main.o"])
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assert(memap.modules["main.o"][".data"] == 8)

‎tools/toolchains/arm.py

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@@ -74,7 +74,7 @@ def __init__(self, target, notify=None, macros=None,
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self.cc = [main_cc] + self.flags['common'] + self.flags['c']
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self.cppc = [main_cc] + self.flags['common'] + self.flags['c'] + self.flags['cxx']
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self.ld = [join(ARM_BIN, "armlink")]
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self.ld = [join(ARM_BIN, "armlink")] + self.flags['ld']
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self.ar = join(ARM_BIN, "armar")
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self.elf2bin = join(ARM_BIN, "fromelf")

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